Changeset 18b6a88 in mainline for kernel/arch/arm32
- Timestamp:
- 2018-04-15T09:35:04Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- c1f44ca
- Parents:
- 8ebe212
- Location:
- kernel/arch/arm32
- Files:
-
- 2 edited
-
include/arch/cycle.h (modified) (1 diff)
-
src/mach/integratorcp/integratorcp.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/cycle.h
r8ebe212 r18b6a88 52 52 if ((ID_PFR1_read() & ID_PFR1_GEN_TIMER_EXT_MASK) == 53 53 ID_PFR1_GEN_TIMER_EXT) { 54 uint32_t low = 0, high = 0; 55 asm volatile( "MRRC p15, 0, %[low], %[high], c14": [low]"=r"(low), [high]"=r"(high)); 56 return ((uint64_t)high << 32) | low; 54 uint32_t low = 0, high = 0; 55 asm volatile ( 56 "MRRC p15, 0, %[low], %[high], c14" 57 : [low] "=r" (low), [high] "=r" (high) 58 ); 59 return ((uint64_t)high << 32) | low; 57 60 } else { 58 61 return (uint64_t)PMCCNTR_read() * 64; -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
r8ebe212 r18b6a88 245 245 void icp_cpu_halt(void) 246 246 { 247 while (true); 247 while (true) 248 ; 248 249 } 249 250 … … 345 346 346 347 #ifdef CONFIG_PL011_UART 347 srln_instance_t *srln_instance = srln_init();348 if (srln_instance) {349 indev_t *sink = stdin_wire();350 indev_t *srln = srln_wire(srln_instance, sink);351 pl011_uart_input_wire(&icp.uart, srln);352 icp_irqc_unmask(ICP_UART0_IRQ);353 }348 srln_instance_t *srln_instance = srln_init(); 349 if (srln_instance) { 350 indev_t *sink = stdin_wire(); 351 indev_t *srln = srln_wire(srln_instance, sink); 352 pl011_uart_input_wire(&icp.uart, srln); 353 icp_irqc_unmask(ICP_UART0_IRQ); 354 } 354 355 #endif 355 356 }
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