Index: uspace/lib/c/arch/arm32/include/libarch/atomic.h
===================================================================
--- uspace/lib/c/arch/arm32/include/libarch/atomic.h	(revision 47b2d7e3f708bed0cc86a39575d3eb6cb2b6e7f8)
+++ uspace/lib/c/arch/arm32/include/libarch/atomic.h	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
@@ -56,27 +56,27 @@
 	 */
 	asm volatile (
-		"1:\n"
-		"	adr %[ret], 1b\n"
-		"	str %[ret], %[rp0]\n"
-		"	adr %[ret], 2f\n"
-		"	str %[ret], %[rp1]\n"
-		"	ldr %[ret], %[addr]\n"
-		"	cmp %[ret], %[ov]\n"
-		"	streq %[nv], %[addr]\n"
-		"2:\n"
-		"	moveq %[ret], #1\n"
-		"	movne %[ret], #0\n"
-		: [ret] "+&r" (ret),
-		  [rp0] "=m" (ras_page[0]),
-		  [rp1] "=m" (ras_page[1]),
-		  [addr] "+m" (val->count)
-		: [ov] "r" (ov),
-		  [nv] "r" (nv)
-		: "memory"
+	    "1:\n"
+	    "	adr %[ret], 1b\n"
+	    "	str %[ret], %[rp0]\n"
+	    "	adr %[ret], 2f\n"
+	    "	str %[ret], %[rp1]\n"
+	    "	ldr %[ret], %[addr]\n"
+	    "	cmp %[ret], %[ov]\n"
+	    "	streq %[nv], %[addr]\n"
+	    "2:\n"
+	    "	moveq %[ret], #1\n"
+	    "	movne %[ret], #0\n"
+	    : [ret] "+&r" (ret),
+	      [rp0] "=m" (ras_page[0]),
+	      [rp1] "=m" (ras_page[1]),
+	      [addr] "+m" (val->count)
+	    : [ov] "r" (ov),
+	      [nv] "r" (nv)
+	    : "memory"
 	);
 
 	ras_page[0] = 0;
 	asm volatile (
-		"" ::: "memory"
+	    "" ::: "memory"
 	);
 	ras_page[1] = 0xffffffff;
@@ -103,23 +103,23 @@
 	 */
 	asm volatile (
-		"1:\n"
-		"	adr %[ret], 1b\n"
-		"	str %[ret], %[rp0]\n"
-		"	adr %[ret], 2f\n"
-		"	str %[ret], %[rp1]\n"
-		"	ldr %[ret], %[addr]\n"
-		"	add %[ret], %[ret], %[imm]\n"
-		"	str %[ret], %[addr]\n"
-		"2:\n"
-		: [ret] "+&r" (ret),
-		  [rp0] "=m" (ras_page[0]),
-		  [rp1] "=m" (ras_page[1]),
-		  [addr] "+m" (val->count)
-		: [imm] "r" (i)
+	    "1:\n"
+	    "	adr %[ret], 1b\n"
+	    "	str %[ret], %[rp0]\n"
+	    "	adr %[ret], 2f\n"
+	    "	str %[ret], %[rp1]\n"
+	    "	ldr %[ret], %[addr]\n"
+	    "	add %[ret], %[ret], %[imm]\n"
+	    "	str %[ret], %[addr]\n"
+	    "2:\n"
+	    : [ret] "+&r" (ret),
+	      [rp0] "=m" (ras_page[0]),
+	      [rp1] "=m" (ras_page[1]),
+	      [addr] "+m" (val->count)
+	    : [imm] "r" (i)
 	);
 
 	ras_page[0] = 0;
 	asm volatile (
-		"" ::: "memory"
+	    "" ::: "memory"
 	);
 	ras_page[1] = 0xffffffff;
Index: uspace/lib/c/arch/arm32/src/syscall.c
===================================================================
--- uspace/lib/c/arch/arm32/src/syscall.c	(revision 47b2d7e3f708bed0cc86a39575d3eb6cb2b6e7f8)
+++ uspace/lib/c/arch/arm32/src/syscall.c	(revision 1433ecda9b732f3f185f902feb26826ec2496e03)
@@ -62,13 +62,13 @@
 
 	asm volatile (
-		"swi 0"
-		: "=r" (__arm_reg_r0)
-		: "r" (__arm_reg_r0),
-		  "r" (__arm_reg_r1),
-		  "r" (__arm_reg_r2),
-		  "r" (__arm_reg_r3),
-		  "r" (__arm_reg_r4),
-		  "r" (__arm_reg_r5),
-		  "r" (__arm_reg_r6)
+	    "swi 0"
+	    : "=r" (__arm_reg_r0)
+	    : "r" (__arm_reg_r0),
+	      "r" (__arm_reg_r1),
+	      "r" (__arm_reg_r2),
+	      "r" (__arm_reg_r3),
+	      "r" (__arm_reg_r4),
+	      "r" (__arm_reg_r5),
+	      "r" (__arm_reg_r6)
 	);
 
