Changeset 1433ecda in mainline for kernel/genarch/src/drivers

Timestamp:

2018-04-04T15:42:37Z (8 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2c4e1cc

Parents:

47b2d7e3

Message:

Fix cstyle: make ccheck-fix and commit only files where all the changes are good.

Location:

kernel/genarch/src/drivers

Files:

• bcm2835/mbox.c (modified) (5 diffs)
• omap/uart.c (modified) (2 diffs)
• pl011/pl011.c (modified) (5 diffs)

kernel/genarch/src/drivers/bcm2835/mbox.c

@@ -40 +40 @@
 static void mbox_write(bcm2835_mbox_t *mbox, uint8_t chan, uint32_t value)
 {
-        while (mbox->status & MBOX_STATUS_FULL) ;
+        while (mbox->status & MBOX_STATUS_FULL)
+                ;
         mbox->write = MBOX_COMPOSE(chan, value);
 }
@@ -49 +50 @@
 
         do {
-                while (mbox->status & MBOX_STATUS_EMPTY) ;
+                while (mbox->status & MBOX_STATUS_EMPTY)
+                        ;
                 msg = mbox->read;
         } while (MBOX_MSG_CHAN(msg) != chan);
@@ -69 +71 @@
 
         mbox_write((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR,
-                   MBOX_CHAN_PROP_A2V, KA2VCA((uint32_t)req));
+            MBOX_CHAN_PROP_A2V, KA2VCA((uint32_t)req));
         mbox_read((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR,
-                  MBOX_CHAN_PROP_A2V);
+            MBOX_CHAN_PROP_A2V);
 
         if (req->buf_hdr.code == MBOX_PROP_CODE_RESP_OK) {
@@ -88 +90 @@
         bcm2835_mbox_t *fb_mbox;
         bool ret = false;
-        MBOX_BUFF_ALLOC(fb_desc, bcm2835_fb_desc_t);
+        MBOX_BUFF_ALLOC(fb_desc, bcm2835_fb_desc_t);
 
         fb_mbox = (void *) km_map(BCM2835_MBOX0_ADDR, sizeof(bcm2835_mbox_t),
-                                  PAGE_NOT_CACHEABLE);
+            PAGE_NOT_CACHEABLE);
 
         fb_desc->width = 640;
@@ -119 +121 @@
 
         printf("BCM2835 framebuffer at 0x%08x (%dx%d)\n", prop->addr,
-               prop->x, prop->y);
+            prop->x, prop->y);
         ret = true;
 out:

kernel/genarch/src/drivers/omap/uart.c

@@ -43 +43 @@
 {
         /* Wait for buffer */
-        while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG);
+        while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG)
+                ;
         /* Write to the outgoing fifo */
         uart->regs->thr = b;
@@ -93 +94 @@
         /* Soft reset the port */
         uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG;
-        while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG));
+        while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG))
+                ;
 
         /* Disable the UART module */

kernel/genarch/src/drivers/pl011/pl011.c

@@ -50 +50 @@
         /* Wait for space becoming available in Tx FIFO. */
         // TODO make pio_read accept consts pointers and remove the cast
-        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
+        while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
                 ;
 
@@ -86 +86 @@
 
         // TODO make pio_read accept const pointers and remove the cast
-        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
+        while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
                 /* We ignore all error flags here */
                 const uint8_t data = pio_read_32(&uart->regs->data);
@@ -99 +99 @@
 {
         assert(uart);
-        uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t),
-                                   PAGE_NOT_CACHEABLE);
+        uart->regs = (void *)km_map(addr, sizeof(pl011_uart_regs_t),
+            PAGE_NOT_CACHEABLE);
         assert(uart->regs);
 
         /* Disable UART */
-        uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG;
+        uart->regs->control &= ~PL011_UART_CONTROL_UARTEN_FLAG;
 
         /* Enable hw flow control */
         uart->regs->control |=
-                PL011_UART_CONTROL_RTSE_FLAG |
-                PL011_UART_CONTROL_CTSE_FLAG;
+            PL011_UART_CONTROL_RTSE_FLAG |
+            PL011_UART_CONTROL_CTSE_FLAG;
 
         /* Mask all interrupts */
@@ -117 +117 @@
         /* Enable UART, TX and RX */
         uart->regs->control |=
-                PL011_UART_CONTROL_UARTEN_FLAG |
-                PL011_UART_CONTROL_TXE_FLAG |
-                PL011_UART_CONTROL_RXE_FLAG;
+            PL011_UART_CONTROL_UARTEN_FLAG |
+            PL011_UART_CONTROL_TXE_FLAG |
+            PL011_UART_CONTROL_RXE_FLAG;
 
         outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops);
@@ -143 +143 @@
         /* Enable receive interrupts */
         uart->regs->interrupt_mask |=
-                PL011_UART_INTERRUPT_RX_FLAG |
-                PL011_UART_INTERRUPT_RT_FLAG;
+            PL011_UART_INTERRUPT_RX_FLAG |
+            PL011_UART_INTERRUPT_RT_FLAG;
 }