Changeset 1433ecda in mainline for kernel/genarch
- Timestamp:
- 2018-04-04T15:42:37Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2c4e1cc
- Parents:
- 47b2d7e3
- Location:
- kernel/genarch
- Files:
-
- 18 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/genarch/include/genarch/acpi/acpi.h
r47b2d7e3 r1433ecda 49 49 uint32_t ext_checksum; 50 50 uint8_t reserved[3]; 51 } __attribute__ 51 } __attribute__((packed)); 52 52 53 53 /* System Description Table Header */ … … 62 62 uint32_t creator_id; 63 63 uint32_t creator_revision; 64 } __attribute__ 64 } __attribute__((packed)); 65 65 66 66 struct acpi_signature_map { … … 74 74 struct acpi_sdt_header header; 75 75 uint32_t entry[]; 76 } __attribute__ 76 } __attribute__((packed)); 77 77 78 78 /* Extended System Description Table */ … … 80 80 struct acpi_sdt_header header; 81 81 uint64_t entry[]; 82 } __attribute__ 82 } __attribute__((packed)); 83 83 84 84 extern struct acpi_rsdp *acpi_rsdp; -
kernel/genarch/include/genarch/acpi/madt.h
r47b2d7e3 r1433ecda 56 56 uint8_t type; 57 57 uint8_t length; 58 } __attribute__ 58 } __attribute__((packed)); 59 59 60 60 /* Multiple APIC Description Table */ … … 64 64 uint32_t flags; 65 65 struct madt_apic_header apic_header[]; 66 } __attribute__ 66 } __attribute__((packed)); 67 67 68 68 struct madt_l_apic { … … 71 71 uint8_t apic_id; 72 72 uint32_t flags; 73 } __attribute__ 73 } __attribute__((packed)); 74 74 75 75 struct madt_io_apic { … … 79 79 uint32_t io_apic_address; 80 80 uint32_t global_intr_base; 81 } __attribute__ 81 } __attribute__((packed)); 82 82 83 83 struct madt_intr_src_ovrd { … … 87 87 uint32_t global_int; 88 88 uint16_t flags; 89 } __attribute__ 89 } __attribute__((packed)); 90 90 91 91 struct madt_nmi_src { … … 93 93 uint16_t flags; 94 94 uint32_t global_intr; 95 } __attribute__ 95 } __attribute__((packed)); 96 96 97 97 struct madt_l_apic_nmi { … … 100 100 uint16_t flags; 101 101 uint8_t l_apic_lint; 102 } __attribute__ 102 } __attribute__((packed)); 103 103 104 104 struct madt_l_apic_addr_ovrd { … … 106 106 uint16_t reserved; 107 107 uint64_t l_apic_address; 108 } __attribute__ 108 } __attribute__((packed)); 109 109 110 110 struct madt_io_sapic { … … 114 114 uint32_t global_intr_base; 115 115 uint64_t io_apic_address; 116 } __attribute__ 116 } __attribute__((packed)); 117 117 118 118 struct madt_l_sapic { … … 125 125 uint32_t acpi_processor_uid_value; 126 126 uint8_t acpi_processor_uid_str[1]; 127 } __attribute__ 127 } __attribute__((packed)); 128 128 129 129 struct madt_platform_intr_src { … … 136 136 uint32_t global_intr; 137 137 uint32_t platform_intr_src_flags; 138 } __attribute__ 138 } __attribute__((packed)); 139 139 140 140 extern struct acpi_madt *acpi_madt; -
kernel/genarch/include/genarch/drivers/am335x/cm_per.h
r47b2d7e3 r1433ecda 77 77 78 78 /* Wait for completion */ 79 while ((*tmr_reg & 0x03) != 0x02); 79 while ((*tmr_reg & 0x03) != 0x02) 80 ; 80 81 } 81 82 -
kernel/genarch/include/genarch/drivers/amdm37x/gpt.h
r47b2d7e3 r1433ecda 203 203 204 204 static inline void amdm37x_gpt_timer_ticks_init( 205 amdm37x_gpt_t *timer, uintptr_t ioregs, size_t iosize, unsigned hz)205 amdm37x_gpt_t *timer, uintptr_t ioregs, size_t iosize, unsigned hz) 206 206 { 207 207 /* Set 32768 Hz clock as source */ 208 208 // TODO find a nicer way to setup 32kHz clock source for timer1 209 209 // reg 0x48004C40 is CM_CLKSEL_WKUP see page 485 of the manual 210 ioport32_t *clksel = (void *) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE);210 ioport32_t *clksel = (void *) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE); 211 211 *clksel &= ~1; 212 212 km_unmap((uintptr_t)clksel, 4); … … 214 214 assert(timer); 215 215 /* Map control register */ 216 timer->regs = (void *) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE);216 timer->regs = (void *) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE); 217 217 218 218 /* Reset the timer */ 219 219 timer->regs->tiocp_cfg |= AMDM37x_GPT_TIOCP_CFG_SOFTRESET_FLAG; 220 220 221 while (!(timer->regs->tistat & AMDM37x_GPT_TISTAT_RESET_DONE_FLAG)); 221 while (!(timer->regs->tistat & AMDM37x_GPT_TISTAT_RESET_DONE_FLAG)) 222 ; 222 223 223 224 /* Set autoreload */ 224 225 timer->regs->tclr |= AMDM37x_GPT_TCLR_AR_FLAG; 225 226 226 timer->special_available = ( 227 (ioregs == AMDM37x_GPT1_BASE_ADDRESS) || 227 timer->special_available = ((ioregs == AMDM37x_GPT1_BASE_ADDRESS) || 228 228 (ioregs == AMDM37x_GPT2_BASE_ADDRESS) || 229 229 (ioregs == AMDM37x_GPT10_BASE_ADDRESS)); … … 246 246 } 247 247 248 static inline void amdm37x_gpt_timer_ticks_start(amdm37x_gpt_t *timer)248 static inline void amdm37x_gpt_timer_ticks_start(amdm37x_gpt_t *timer) 249 249 { 250 250 assert(timer); … … 256 256 } 257 257 258 static inline bool amdm37x_gpt_irq_ack(amdm37x_gpt_t *timer)258 static inline bool amdm37x_gpt_irq_ack(amdm37x_gpt_t *timer) 259 259 { 260 260 assert(timer); -
kernel/genarch/include/genarch/drivers/bcm2835/irc.h
r47b2d7e3 r1433ecda 59 59 #define IRQ_PEND_SHORT_S 10 60 60 61 unsigned shortcut_inums[] = { 7, 9, 10, 18, 19, 53, 54, 55, 56, 57, 62};61 unsigned shortcut_inums[] = { 7, 9, 10, 18, 19, 53, 54, 55, 56, 57, 62 }; 62 62 63 63 typedef struct { … … 108 108 109 109 asm volatile ( 110 "clz r0, %[x]\n" 111 "rsb %[ret], r0, #32\n" 112 : [ret] "=r" (ret) 113 : [x] "r" (x) 114 : "r0" ); 110 "clz r0, %[x]\n" 111 "rsb %[ret], r0, #32\n" 112 : [ret] "=r" (ret) 113 : [x] "r" (x) 114 : "r0" 115 ); 115 116 116 117 return ret; -
kernel/genarch/include/genarch/drivers/bcm2835/timer.h
r47b2d7e3 r1433ecda 65 65 66 66 67 static inline void bcm2835_timer_start(bcm2835_timer_t *timer)67 static inline void bcm2835_timer_start(bcm2835_timer_t *timer) 68 68 { 69 69 assert(timer); … … 74 74 } 75 75 76 static inline void bcm2835_timer_irq_ack(bcm2835_timer_t *timer)76 static inline void bcm2835_timer_irq_ack(bcm2835_timer_t *timer) 77 77 { 78 78 assert(timer); -
kernel/genarch/include/genarch/drivers/dsrln/dsrlnin.h
r47b2d7e3 r1433ecda 44 44 typedef struct { 45 45 ioport8_t data; 46 } __attribute__ 46 } __attribute__((packed)) dsrlnin_t; 47 47 48 48 typedef struct { -
kernel/genarch/include/genarch/drivers/i8042/i8042.h
r47b2d7e3 r1433ecda 44 44 uint8_t pad[3]; 45 45 ioport8_t status; 46 } __attribute__ 46 } __attribute__((packed)) i8042_t; 47 47 48 48 typedef struct { -
kernel/genarch/include/genarch/multiboot/multiboot2.h
r47b2d7e3 r1433ecda 91 91 uint32_t entry_size; 92 92 uint32_t entry_version; 93 } __attribute__ 93 } __attribute__((packed)) multiboot2_memmap_t; 94 94 95 95 /** Multiboot2 memmap entry structure */ -
kernel/genarch/include/genarch/ofw/ebus.h
r47b2d7e3 r1433ecda 39 39 uint32_t addr; 40 40 uint32_t size; 41 } __attribute__ 41 } __attribute__((packed)) ofw_ebus_reg_t; 42 42 43 43 typedef struct { … … 49 49 uint64_t parent_base; 50 50 uint32_t size; 51 } __attribute__ 51 } __attribute__((packed)) ofw_ebus_range_t; 52 52 53 53 typedef struct { … … 57 57 uint32_t controller_handle; 58 58 uint32_t controller_ino; 59 } __attribute__ 59 } __attribute__((packed)) ofw_ebus_intr_map_t; 60 60 61 61 typedef struct { … … 63 63 uint32_t addr_mask; 64 64 uint32_t intr_mask; 65 } __attribute__ 65 } __attribute__((packed)) ofw_ebus_intr_mask_t; 66 66 67 67 extern bool ofw_ebus_apply_ranges(ofw_tree_node_t *, ofw_ebus_reg_t *, -
kernel/genarch/include/genarch/ofw/pci.h
r47b2d7e3 r1433ecda 42 42 uint64_t addr; 43 43 uint64_t size; 44 } __attribute__ 44 } __attribute__((packed)) ofw_pci_reg_t; 45 45 46 46 typedef struct { … … 51 51 uint64_t parent_base; 52 52 uint64_t size; 53 } __attribute__ 53 } __attribute__((packed)) ofw_pci_range_t; 54 54 55 55 extern bool ofw_pci_apply_ranges(ofw_tree_node_t *, ofw_pci_reg_t *, -
kernel/genarch/include/genarch/ofw/sbus.h
r47b2d7e3 r1433ecda 38 38 uint64_t addr; 39 39 uint32_t size; 40 } __attribute__ 40 } __attribute__((packed)) ofw_sbus_reg_t; 41 41 42 42 typedef struct { … … 44 44 uint64_t parent_base; 45 45 uint32_t size; 46 } __attribute__ 46 } __attribute__((packed)) ofw_sbus_range_t; 47 47 48 48 extern bool ofw_sbus_apply_ranges(ofw_tree_node_t *, ofw_sbus_reg_t *, -
kernel/genarch/include/genarch/ofw/upa.h
r47b2d7e3 r1433ecda 38 38 uint64_t addr; 39 39 uint64_t size; 40 } __attribute__ 40 } __attribute__((packed)) ofw_upa_reg_t; 41 41 42 42 extern bool ofw_upa_apply_ranges(ofw_tree_node_t *, ofw_upa_reg_t *, -
kernel/genarch/src/drivers/bcm2835/mbox.c
r47b2d7e3 r1433ecda 40 40 static void mbox_write(bcm2835_mbox_t *mbox, uint8_t chan, uint32_t value) 41 41 { 42 while (mbox->status & MBOX_STATUS_FULL) ; 42 while (mbox->status & MBOX_STATUS_FULL) 43 ; 43 44 mbox->write = MBOX_COMPOSE(chan, value); 44 45 } … … 49 50 50 51 do { 51 while (mbox->status & MBOX_STATUS_EMPTY) ; 52 while (mbox->status & MBOX_STATUS_EMPTY) 53 ; 52 54 msg = mbox->read; 53 55 } while (MBOX_MSG_CHAN(msg) != chan); … … 69 71 70 72 mbox_write((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR, 71 73 MBOX_CHAN_PROP_A2V, KA2VCA((uint32_t)req)); 72 74 mbox_read((bcm2835_mbox_t *)BCM2835_MBOX0_ADDR, 73 75 MBOX_CHAN_PROP_A2V); 74 76 75 77 if (req->buf_hdr.code == MBOX_PROP_CODE_RESP_OK) { … … 88 90 bcm2835_mbox_t *fb_mbox; 89 91 bool ret = false; 90 92 MBOX_BUFF_ALLOC(fb_desc, bcm2835_fb_desc_t); 91 93 92 94 fb_mbox = (void *) km_map(BCM2835_MBOX0_ADDR, sizeof(bcm2835_mbox_t), 93 95 PAGE_NOT_CACHEABLE); 94 96 95 97 fb_desc->width = 640; … … 119 121 120 122 printf("BCM2835 framebuffer at 0x%08x (%dx%d)\n", prop->addr, 121 123 prop->x, prop->y); 122 124 ret = true; 123 125 out: -
kernel/genarch/src/drivers/omap/uart.c
r47b2d7e3 r1433ecda 43 43 { 44 44 /* Wait for buffer */ 45 while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG); 45 while (uart->regs->ssr & OMAP_UART_SSR_TX_FIFO_FULL_FLAG) 46 ; 46 47 /* Write to the outgoing fifo */ 47 48 uart->regs->thr = b; … … 93 94 /* Soft reset the port */ 94 95 uart->regs->sysc = OMAP_UART_SYSC_SOFTRESET_FLAG; 95 while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG)); 96 while (!(uart->regs->syss & OMAP_UART_SYSS_RESETDONE_FLAG)) 97 ; 96 98 97 99 /* Disable the UART module */ -
kernel/genarch/src/drivers/pl011/pl011.c
r47b2d7e3 r1433ecda 50 50 /* Wait for space becoming available in Tx FIFO. */ 51 51 // TODO make pio_read accept consts pointers and remove the cast 52 while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)52 while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0) 53 53 ; 54 54 … … 86 86 87 87 // TODO make pio_read accept const pointers and remove the cast 88 while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {88 while ((pio_read_32((ioport32_t *)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) { 89 89 /* We ignore all error flags here */ 90 90 const uint8_t data = pio_read_32(&uart->regs->data); … … 99 99 { 100 100 assert(uart); 101 uart->regs = (void *)km_map(addr, sizeof(pl011_uart_regs_t),102 101 uart->regs = (void *)km_map(addr, sizeof(pl011_uart_regs_t), 102 PAGE_NOT_CACHEABLE); 103 103 assert(uart->regs); 104 104 105 105 /* Disable UART */ 106 uart->regs->control &= ~ 106 uart->regs->control &= ~PL011_UART_CONTROL_UARTEN_FLAG; 107 107 108 108 /* Enable hw flow control */ 109 109 uart->regs->control |= 110 111 110 PL011_UART_CONTROL_RTSE_FLAG | 111 PL011_UART_CONTROL_CTSE_FLAG; 112 112 113 113 /* Mask all interrupts */ … … 117 117 /* Enable UART, TX and RX */ 118 118 uart->regs->control |= 119 120 121 119 PL011_UART_CONTROL_UARTEN_FLAG | 120 PL011_UART_CONTROL_TXE_FLAG | 121 PL011_UART_CONTROL_RXE_FLAG; 122 122 123 123 outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops); … … 143 143 /* Enable receive interrupts */ 144 144 uart->regs->interrupt_mask |= 145 146 145 PL011_UART_INTERRUPT_RX_FLAG | 146 PL011_UART_INTERRUPT_RT_FLAG; 147 147 } 148 148 -
kernel/genarch/src/mm/page_ht.c
r47b2d7e3 r1433ecda 222 222 } 223 223 224 static pte_t * 225 ht_mapping_find_internal(as_t *as, uintptr_t page, bool nolock) 224 static pte_t *ht_mapping_find_internal(as_t *as, uintptr_t page, bool nolock) 226 225 { 227 226 uintptr_t key[2] = { -
kernel/genarch/src/softint/multiplication.c
r47b2d7e3 r1433ecda 54 54 * @result 55 55 */ 56 static unsigned long long mul(unsigned int a, unsigned int b) { 56 static unsigned long long mul(unsigned int a, unsigned int b) 57 { 57 58 unsigned int a1, a2, b1, b2; 58 59 unsigned long long t1, t2, t3; … … 64 65 65 66 t1 = a1 * b1; 66 t2 = a1 *b2;67 t2 += a2 *b1;68 t3 = a2 *b2;67 t2 = a1 * b2; 68 t2 += a2 * b1; 69 t3 = a2 * b2; 69 70 70 71 t3 = (((t1 << 16) + t2) << 16) + t3; … … 79 80 { 80 81 long long result; 81 unsigned long long t1, t2;82 unsigned long long t1, t2; 82 83 unsigned long long a1, a2, b1, b2; 83 84 char neg = 0; … … 101 102 if (SOFTINT_CHECK_OF && (a1 != 0) && (b1 != 0)) { 102 103 // error, overflow 103 return (neg ?MIN_INT64:MAX_INT64);104 return (neg ? MIN_INT64 : MAX_INT64); 104 105 } 105 106 106 107 // (if OF checked) a1 or b1 is zero => result fits in 64 bits, no need to another overflow check 107 t1 = mul(a1, b2) + mul(b1,a2);108 t1 = mul(a1, b2) + mul(b1, a2); 108 109 109 110 if (SOFTINT_CHECK_OF && t1 > MAX_UINT32) { 110 111 // error, overflow 111 return (neg ?MIN_INT64:MAX_INT64);112 return (neg ? MIN_INT64 : MAX_INT64); 112 113 } 113 114 114 115 t1 = t1 << 32; 115 t2 = mul(a2, b2);116 t2 = mul(a2, b2); 116 117 t2 += t1; 117 118 … … 120 121 if (SOFTINT_CHECK_OF && ((t2 < t1) || (t2 & (1ull << 63)))) { 121 122 // error, overflow 122 return (neg ?MIN_INT64:MAX_INT64);123 return (neg ? MIN_INT64 : MAX_INT64); 123 124 } 124 125
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