Changeset 1433ecda in mainline for kernel/arch/ppc32
- Timestamp:
- 2018-04-04T15:42:37Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2c4e1cc
- Parents:
- 47b2d7e3
- Location:
- kernel/arch/ppc32
- Files:
-
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ppc32/include/arch/asm.h
r47b2d7e3 r1433ecda 47 47 48 48 asm volatile ( 49 50 49 "mfmsr %[msr]\n" 50 : [msr] "=r" (msr) 51 51 ); 52 52 … … 57 57 { 58 58 asm volatile ( 59 60 61 59 "mtmsr %[msr]\n" 60 "isync\n" 61 :: [msr] "r" (msr) 62 62 ); 63 63 } … … 66 66 { 67 67 asm volatile ( 68 69 70 71 72 68 "mtsrin %[value], %[sr]\n" 69 "sync\n" 70 "isync\n" 71 :: [value] "r" ((flags << 16) + (asid << 4) + sr), 72 [sr] "r" (sr << 28) 73 73 ); 74 74 } … … 79 79 80 80 asm volatile ( 81 82 83 81 "mfsrin %[vsid], %[vaddr]\n" 82 : [vsid] "=r" (vsid) 83 : [vaddr] "r" (vaddr) 84 84 ); 85 85 … … 92 92 93 93 asm volatile ( 94 95 94 "mfsdr1 %[sdr1]\n" 95 : [sdr1] "=r" (sdr1) 96 96 ); 97 97 … … 175 175 176 176 asm volatile ( 177 178 179 177 "and %[base], %%sp, %[mask]\n" 178 : [base] "=r" (base) 179 : [mask] "r" (~(STACK_SIZE - 1)) 180 180 ); 181 181 -
kernel/arch/ppc32/include/arch/atomic.h
r47b2d7e3 r1433ecda 43 43 44 44 asm volatile ( 45 46 47 48 49 50 51 52 53 54 45 "1:\n" 46 " lwarx %[tmp], 0, %[count_ptr]\n" 47 " addic %[tmp], %[tmp], 1\n" 48 " stwcx. %[tmp], 0, %[count_ptr]\n" 49 " bne- 1b" 50 : [tmp] "=&r" (tmp), 51 "=m" (val->count) 52 : [count_ptr] "r" (&val->count), 53 "m" (val->count) 54 : "cc" 55 55 ); 56 56 } … … 61 61 62 62 asm volatile ( 63 64 65 66 67 68 69 70 71 72 63 "1:\n" 64 " lwarx %[tmp], 0, %[count_ptr]\n" 65 " addic %[tmp], %[tmp], -1\n" 66 " stwcx. %[tmp], 0, %[count_ptr]\n" 67 " bne- 1b" 68 : [tmp] "=&r" (tmp), 69 "=m" (val->count) 70 : [count_ptr] "r" (&val->count), 71 "m" (val->count) 72 : "cc" 73 73 ); 74 74 } -
kernel/arch/ppc32/include/arch/barrier.h
r47b2d7e3 r1433ecda 65 65 { 66 66 asm volatile ( 67 68 69 70 71 72 67 "dcbst 0, %[addr]\n" 68 "sync\n" 69 "icbi 0, %[addr]\n" 70 "sync\n" 71 "isync\n" 72 :: [addr] "r" (addr) 73 73 ); 74 74 } … … 80 80 for (i = 0; i < len; i += COHERENCE_INVAL_MIN) 81 81 asm volatile ( 82 83 82 "dcbst 0, %[addr]\n" 83 :: [addr] "r" (addr + i) 84 84 ); 85 85 … … 88 88 for (i = 0; i < len; i += COHERENCE_INVAL_MIN) 89 89 asm volatile ( 90 91 90 "icbi 0, %[addr]\n" 91 :: [addr] "r" (addr + i) 92 92 ); 93 93 -
kernel/arch/ppc32/include/arch/cpu.h
r47b2d7e3 r1433ecda 42 42 uint16_t version; 43 43 uint16_t revision; 44 } __attribute__ 44 } __attribute__((packed)) cpu_arch_t; 45 45 46 46 NO_TRACE static inline void cpu_version(cpu_arch_t *info) 47 47 { 48 48 asm volatile ( 49 50 49 "mfpvr %[cpu_info]\n" 50 : [cpu_info] "=r" (*info) 51 51 ); 52 52 } -
kernel/arch/ppc32/include/arch/cycle.h
r47b2d7e3 r1433ecda 46 46 do { 47 47 asm volatile ( 48 49 50 51 52 53 48 "mftbu %[upper]\n" 49 "mftb %[lower]\n" 50 "mftbu %[tmp]\n" 51 : [upper] "=r" (upper), 52 [lower] "=r" (lower), 53 [tmp] "=r" (tmp) 54 54 ); 55 55 } while (upper != tmp); -
kernel/arch/ppc32/include/arch/mm/frame.h
r47b2d7e3 r1433ecda 51 51 52 52 asm volatile ( 53 54 53 "mfsprg3 %[physmem]\n" 54 : [physmem] "=r" (physmem) 55 55 ); 56 56 -
kernel/arch/ppc32/include/arch/mm/page.h
r47b2d7e3 r1433ecda 43 43 44 44 #ifndef __ASSEMBLER__ 45 46 45 #define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 46 #define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) 47 47 #else 48 49 48 #define KA2PA(x) ((x) - 0x80000000) 49 #define PA2KA(x) ((x) + 0x80000000) 50 50 #endif 51 51 -
kernel/arch/ppc32/src/cpu/cpu.c
r47b2d7e3 r1433ecda 72 72 } 73 73 74 printf("cpu%u: version=%" PRIu16 " (%s), revision=%" PRIu16 "\n", cpu->id,74 printf("cpu%u: version=%" PRIu16 " (%s), revision=%" PRIu16 "\n", cpu->id, 75 75 cpu->arch.version, name, cpu->arch.revision); 76 76 } -
kernel/arch/ppc32/src/interrupt.c
r47b2d7e3 r1433ecda 57 57 { 58 58 asm volatile ( 59 60 59 "mtdec %[dec]\n" 60 :: [dec] "r" (decrementer_value) 61 61 ); 62 62 } -
kernel/arch/ppc32/src/mm/tlb.c
r47b2d7e3 r1433ecda 44 44 45 45 asm volatile ( 46 47 48 49 50 51 46 "mfspr %[tlbmiss], 980\n" 47 "mfspr %[ptehi], 981\n" 48 "mfspr %[ptelo], 982\n" 49 : [tlbmiss] "=r" (tlbmiss), 50 [ptehi] "=r" (ptehi), 51 [ptelo] "=r" (ptelo) 52 52 ); 53 53 … … 64 64 uint32_t index = 0; 65 65 asm volatile ( 66 67 68 69 70 71 72 66 "mtspr 981, %[ptehi]\n" 67 "mtspr 982, %[ptelo]\n" 68 "tlbld %[index]\n" 69 "tlbli %[index]\n" 70 : [index] "=r" (index) 71 : [ptehi] "r" (ptehi), 72 [ptelo] "r" (ptelo) 73 73 ); 74 74 } … … 82 82 { 83 83 asm volatile ( 84 84 "sync\n" 85 85 ); 86 86 87 87 for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) { 88 88 asm volatile ( 89 90 89 "tlbie %[i]\n" 90 :: [i] "r" (i) 91 91 ); 92 92 } 93 93 94 94 asm volatile ( 95 96 97 95 "eieio\n" 96 "tlbsync\n" 97 "sync\n" 98 98 ); 99 99 } -
kernel/arch/ppc32/src/proc/scheduler.c
r47b2d7e3 r1433ecda 54 54 55 55 asm volatile ( 56 57 56 "mtsprg0 %[ksp]\n" 57 :: [ksp] "r" (KA2PA(&THREAD->kstack[STACK_SIZE])) 58 58 ); 59 59 }
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