Changeset 1433ecda in mainline for kernel/arch/ia32/src

Timestamp:

2018-04-04T15:42:37Z (7 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2c4e1cc

Parents:

47b2d7e3

Message:

Fix cstyle: make ccheck-fix and commit only files where all the changes are good.

Location:

kernel/arch/ia32/src

Files:

• fpu_context.c (modified) (5 diffs)
• interrupt.c (modified) (2 diffs)
• mm/frame.c (modified) (1 diff)
• smp/apic.c (modified) (1 diff)
• smp/mps.c (modified) (2 diffs)

kernel/arch/ia32/src/fpu_context.c

@@ -71 +71 @@
 {
         asm volatile (
-                "fnsave %[fctx]"
-                : [fctx] "=m" (fctx->fpu)
+            "fnsave %[fctx]"
+            : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -79 +79 @@
 {
         asm volatile (
-                "frstor %[fctx]"
-                : [fctx] "=m" (fctx->fpu)
+            "frstor %[fctx]"
+            : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -87 +87 @@
 {
         asm volatile (
-                "fxsave %[fctx]"
-                : [fctx] "=m" (fctx->fpu)
+            "fxsave %[fctx]"
+            : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -95 +95 @@
 {
         asm volatile (
-                "fxrstor %[fctx]"
-                : [fctx] "=m" (fctx->fpu)
+            "fxrstor %[fctx]"
+            : [fctx] "=m" (fctx->fpu)
         );
 }
@@ -131 +131 @@
 
         asm volatile (
-                "fninit\n"
-                "stmxcsr %[help0]\n"
-                "mov %[help0], %[help1]\n"
-                "or %[magic], %[help1]\n"
-                "mov %[help1], %[help0]\n"
-                "ldmxcsr %[help0]\n"
-                : [help0] "+m" (help0), [help1] "+r" (help1)
-                : [magic] "i" (X87_ALL_MASK)
+            "fninit\n"
+            "stmxcsr %[help0]\n"
+            "mov %[help0], %[help1]\n"
+            "or %[magic], %[help1]\n"
+            "mov %[help1], %[help0]\n"
+            "ldmxcsr %[help0]\n"
+            : [help0] "+m" (help0), [help1] "+r" (help1)
+            : [magic] "i" (X87_ALL_MASK)
         );
 }

kernel/arch/ia32/src/interrupt.c

@@ -62 +62 @@
  */
 
-void (* disable_irqs_function)(uint16_t irqmask) = NULL;
-void (* enable_irqs_function)(uint16_t irqmask) = NULL;
-void (* eoi_function)(void) = NULL;
+void (*disable_irqs_function)(uint16_t irqmask) = NULL;
+void (*enable_irqs_function)(uint16_t irqmask) = NULL;
+void (*eoi_function)(void) = NULL;
 const char *irqs_info = NULL;
 
@@ -146 +146 @@
         uint32_t mxcsr;
         asm volatile (
-                "stmxcsr %[mxcsr]\n"
-                : [mxcsr] "=m" (mxcsr)
+            "stmxcsr %[mxcsr]\n"
+            : [mxcsr] "=m" (mxcsr)
         );
 

kernel/arch/ia32/src/mm/frame.c

@@ -142 +142 @@
                         name = "invalid";
 
-                printf("%#018" PRIx64 " %#018" PRIx64" %s\n", e820table[i].base_address,
+                printf("%#018" PRIx64 " %#018" PRIx64 " %s\n", e820table[i].base_address,
                     e820table[i].size, name);
         }

kernel/arch/ia32/src/smp/apic.c

@@ -482 +482 @@
         l_apic[ICRT] = 0xffffffff;
 
-        while (l_apic[CCRT] == t1);
+        while (l_apic[CCRT] == t1)
+                ;
 
         t1 = l_apic[CCRT];

kernel/arch/ia32/src/smp/mps.c

@@ -257 +257 @@
         }
 
-        log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " io_apic=%" PRIu8" pin=%"
+        log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " io_apic=%" PRIu8 " pin=%"
             PRIu8, iointr->src_bus_id, iointr->src_bus_irq,
             iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
@@ -320 +320 @@
         }
 
-        log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " l_apic=%" PRIu8" pin=%"
+        log_printf(", bus=%" PRIu8 " irq=%" PRIu8 " l_apic=%" PRIu8 " pin=%"
             PRIu8, lintr->src_bus_id, lintr->src_bus_irq,
             lintr->dst_l_apic_id, lintr->dst_l_apic_pin);