Changeset 1433ecda in mainline for kernel/arch/arm32
- Timestamp:
- 2018-04-04T15:42:37Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2c4e1cc
- Parents:
- 47b2d7e3
- Location:
- kernel/arch/arm32
- Files:
-
- 10 edited
-
include/arch/mm/page_fault.h (modified) (1 diff)
-
src/arm32.c (modified) (1 diff)
-
src/atomic.c (modified) (2 diffs)
-
src/cpu/cpu.c (modified) (2 diffs)
-
src/fpu_context.c (modified) (1 diff)
-
src/mach/beagleboardxm/beagleboardxm.c (modified) (1 diff)
-
src/mach/beaglebone/beaglebone.c (modified) (2 diffs)
-
src/machine_func.c (modified) (1 diff)
-
src/mm/page_fault.c (modified) (3 diffs)
-
src/userspace.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/mm/page_fault.h
r47b2d7e3 r1433ecda 58 58 unsigned fs : 1; /**< armv6+ mandated, earlier IPLM. DEFINED */ 59 59 unsigned wr : 1; /**< armv6+ only */ 60 unsigned ext : 1 ; /**< external abort */60 unsigned ext : 1; /**< external abort */ 61 61 unsigned cm : 1; /**< Cache maintenance, needs LPAE support */ 62 62 unsigned should_be_zero : 18; -
kernel/arch/arm32/src/arm32.c
r47b2d7e3 r1433ecda 156 156 { 157 157 /* not implemented */ 158 while (true); 158 while (true) 159 ; 159 160 } 160 161 -
kernel/arch/arm32/src/atomic.c
r47b2d7e3 r1433ecda 44 44 * returns the previous value of \a *ptr. 45 45 */ 46 void * __sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val)46 void *__sync_val_compare_and_swap_4(void **ptr, void *expected, void *new_val) 47 47 { 48 48 /* … … 55 55 irq_spinlock_lock(&cas_lock, true); 56 56 57 void * cur_val = *ptr;57 void *cur_val = *ptr; 58 58 59 59 if (cur_val == expected) { -
kernel/arch/arm32/src/cpu/cpu.c
r47b2d7e3 r1433ecda 62 62 63 63 /** Implementers (vendor) names */ 64 static const char * implementer(unsigned id)64 static const char *implementer(unsigned id) 65 65 { 66 66 switch (id) { 67 case 0x41: return "ARM Limited"; 68 case 0x44: return "Digital Equipment Corporation"; 69 case 0x4d: return "Motorola, Freescale Semiconductor Inc."; 70 case 0x51: return "Qualcomm Inc."; 71 case 0x56: return "Marvell Semiconductor Inc."; 72 case 0x69: return "Intel Corporation"; 67 case 0x41: 68 return "ARM Limited"; 69 case 0x44: 70 return "Digital Equipment Corporation"; 71 case 0x4d: 72 return "Motorola, Freescale Semiconductor Inc."; 73 case 0x51: 74 return "Qualcomm Inc."; 75 case 0x56: 76 return "Marvell Semiconductor Inc."; 77 case 0x69: 78 return "Intel Corporation"; 73 79 } 74 80 return "Unknown implementer"; … … 76 82 77 83 /** Architecture names */ 78 static const char * architecture_string(cpu_arch_t *arch)84 static const char *architecture_string(cpu_arch_t *arch) 79 85 { 80 86 static const char *arch_data[] = { -
kernel/arch/arm32/src/fpu_context.c
r47b2d7e3 r1433ecda 126 126 * Moreover they need to have same access enabled */ 127 127 if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) && 128 ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) {128 ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) { 129 129 printf("No access to CP10 and CP11: %" PRIx32 "\n", cpacr); 130 130 return 0; -
kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c
r47b2d7e3 r1433ecda 130 130 static void bbxm_cpu_halt(void) 131 131 { 132 while (1); 132 while (1) 133 ; 133 134 } 134 135 -
kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
r47b2d7e3 r1433ecda 137 137 /* Select the SYSCLK as the clock source for the dmtimer2 module */ 138 138 am335x_clock_source_select(bbone.cm_dpll_addr, DMTIMER2, 139 CLK_SRC_M_OSC);139 CLK_SRC_M_OSC); 140 140 /* Initialize the DMTIMER2 */ 141 141 if (am335x_ctrl_module_clock_freq_get(bbone.ctrl_module, … … 159 159 static void bbone_cpu_halt(void) 160 160 { 161 while (1); 161 while (1) 162 ; 162 163 } 163 164 -
kernel/arch/arm32/src/machine_func.c
r47b2d7e3 r1433ecda 137 137 } 138 138 139 const char * machine_get_platform_name(void)139 const char *machine_get_platform_name(void) 140 140 { 141 141 if (machine_ops->machine_get_platform_name) -
kernel/arch/arm32/src/mm/page_fault.c
r47b2d7e3 r1433ecda 75 75 } dfsr_source_t; 76 76 77 static inline const char * dfsr_source_to_str(dfsr_source_t source)77 static inline const char *dfsr_source_to_str(dfsr_source_t source) 78 78 { 79 79 switch (source) { … … 149 149 panic("page_fault - instruction does not access memory " 150 150 "(instr_code: %#0" PRIx32 ", badvaddr:%p).", 151 *(uint32_t *)instr_union.instr, (void *) badvaddr);151 *(uint32_t *)instr_union.instr, (void *) badvaddr); 152 152 return PF_ACCESS_EXEC; 153 153 } … … 177 177 { 0x0fb00000, 0x01000000, PF_ACCESS_WRITE }, 178 178 }; 179 const uint32_t inst = *(uint32_t *)instr_addr;179 const uint32_t inst = *(uint32_t *)instr_addr; 180 180 for (unsigned i = 0; i < sizeof(ls_inst) / sizeof(ls_inst[0]); ++i) { 181 181 if ((inst & ls_inst[i].mask) == ls_inst[i].value) { -
kernel/arch/arm32/src/userspace.c
r47b2d7e3 r1433ecda 104 104 /* set user mode, set registers, jump */ 105 105 asm volatile ( 106 "mov sp, %[ustate]\n"107 "msr spsr_c, %[user_mode]\n"108 "ldmfd sp, {r0-r12, sp, lr}^\n"109 "nop\n" /* Cannot access sp immediately after ldm(2) */110 "add sp, sp, #(15*4)\n"111 "ldmfd sp!, {pc}^\n"112 :: [ustate] "r" (&ustate), [user_mode] "r" (user_mode)106 "mov sp, %[ustate]\n" 107 "msr spsr_c, %[user_mode]\n" 108 "ldmfd sp, {r0-r12, sp, lr}^\n" 109 "nop\n" /* Cannot access sp immediately after ldm(2) */ 110 "add sp, sp, #(15*4)\n" 111 "ldmfd sp!, {pc}^\n" 112 :: [ustate] "r" (&ustate), [user_mode] "r" (user_mode) 113 113 ); 114 114 115 115 /* unreachable */ 116 while (1)116 while (1) 117 117 ; 118 118 }
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