Changeset 0fa6044 in mainline for kernel/arch/sparc64/src/trap


Ignore:
Timestamp:
2006-08-29T15:35:44Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e11ae91
Parents:
32fffef0
Message:

sparc64 work.

Fix bug introduced in revision 1852. When fixing CWP,
the input registers of the current window (i.e. output
registers of the window belonging to the interrupted
context) must be preserved. Preserve those registers
in memory. Sure there exist more efficient ways how to
copy the inputs.

Simplify before_thread_runs_arch(), resp. after_thread_ran_arch(),
and make them install, resp. uninstall, DTLB locked mapping for
eventual userspace window buffer.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/trap/trap_table.S

    r32fffef0 r0fa6044  
    413413        /*
    414414         * Fix CWP.
    415          */
    416         mov %fp, %g1
     415         * Just for reminder, the input registers in the current window
     416         * are the output registers of the window to which we want to
     417         * restore. Because the fill trap fills only input and local
     418         * registers of a window, we need to preserve those output
     419         * registers manually.
     420         */
    417421        flushw
     422        mov %sp, %g1
     423        stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
     424        stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
     425        stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
     426        stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
     427        stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
     428        stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
     429        stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
     430        stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
    418431        wrpr %l0, 0, %cwp
    419         mov %g1, %fp
    420        
     432        mov %g1, %sp
     433        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
     434        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
     435        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
     436        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
     437        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
     438        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
     439        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
     440        ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
     441
    421442        /*
    422443         * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
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