Changeset 0f17bff in mainline for kernel/arch/ia32/src
- Timestamp:
- 2016-05-05T08:34:45Z (9 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 811770c
- Parents:
- 4b0206c
- Location:
- kernel/arch/ia32/src
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/src/asm.S
r4b0206c r0f17bff 36 36 #include <arch/mm/page.h> 37 37 #include <arch/istate_struct.h> 38 #include <arch/smp/apic.h> 38 39 39 40 .text … … 110 111 FUNCTION_BEGIN(paging_on) 111 112 movl %cr0, %edx 112 orl $ (1 << 31), %edx /* paging on */113 orl $CR0_PG, %edx /* paging on */ 113 114 114 115 /* Clear Cache Disable and not Write Though */ 115 andl $~( (1 << 30) | (1 << 29)), %edx116 andl $~(CR0_CD | CR0_NW), %edx 116 117 movl %edx, %cr0 117 118 jmp 0f … … 127 128 */ 128 129 FUNCTION_BEGIN(enable_l_apic_in_msr) 129 movl $ 0x1b, %ecx130 movl $IA32_MSR_APIC_BASE, %ecx 130 131 rdmsr 131 orl $(1 << 11), %eax 132 orl $(0xfee00000), %eax 132 orl $(L_APIC_BASE | IA32_APIC_BASE_GE), %eax 133 133 wrmsr 134 134 ret -
kernel/arch/ia32/src/pm.c
r4b0206c r0f17bff 47 47 #include <arch/boot/boot.h> 48 48 #include <interrupt.h> 49 #include <arch/cpu.h> 49 50 50 51 /* … … 256 257 } 257 258 258 /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */259 static void clean_IOPL_NT_flags(void)260 {261 asm volatile (262 "pushfl\n"263 "pop %%eax\n"264 "and $0xffff8fff, %%eax\n"265 "push %%eax\n"266 "popfl\n"267 ::: "eax"268 );269 }270 271 /* Clean AM(18) flag in CR0 register */272 static void clean_AM_flag(void)273 {274 asm volatile (275 "mov %%cr0, %%eax\n"276 "and $0xfffbffff, %%eax\n"277 "mov %%eax, %%cr0\n"278 ::: "eax"279 );280 }281 282 259 void pm_init(void) 283 260 { … … 326 303 tr_load(GDT_SELECTOR(TSS_DES)); 327 304 328 clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels and clear NT flag. */ 329 clean_AM_flag(); /* Disable alignment check */ 305 /* Disable I/O on nonprivileged levels and clear NT flag. */ 306 write_eflags(read_eflags() & ~(EFLAGS_IOPL | EFLAGS_NT)); 307 308 /* Disable alignment check */ 309 write_cr0(read_cr0() & ~CR0_AM); 330 310 } 331 311 -
kernel/arch/ia32/src/smp/apic.c
r4b0206c r0f17bff 72 72 * 73 73 */ 74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);74 volatile uint32_t *l_apic = (uint32_t *) L_APIC_BASE; 75 volatile uint32_t *io_apic = (uint32_t *) IO_APIC_BASE; 76 76 77 77 uint32_t apic_id_mask = 0; -
kernel/arch/ia32/src/userspace.c
r4b0206c r0f17bff 39 39 #include <abi/proc/uarg.h> 40 40 #include <mm/as.h> 41 #include <arch/cpu.h> 42 #include <arch/asm.h> 41 43 42 44 /** Enter userspace … … 47 49 void userspace(uspace_arg_t *kernel_uarg) 48 50 { 49 ipl_t ipl = interrupts_disable();51 uint32_t eflags = read_eflags(); 50 52 51 53 asm volatile ( 52 /*53 * Clear nested task flag.54 */55 "pushfl\n"56 "pop %%eax\n"57 "and $0xffffbfff, %%eax\n"58 "push %%eax\n"59 "popfl\n"60 61 54 /* Set up GS register (virtual register segment) */ 62 55 "movl %[vreg_des], %%gs\n" … … 64 57 "pushl %[udata_des]\n" 65 58 "pushl %[stack_top]\n" 66 "pushl %[ ipl]\n"59 "pushl %[eflags]\n" 67 60 "pushl %[utext_des]\n" 68 61 "pushl %[entry]\n" … … 74 67 "iret\n" 75 68 : 76 : [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER), 69 : [eflags_mask] "i" (~EFLAGS_NT), 70 [udata_des] "i" (GDT_SELECTOR(UDATA_DES) | PL_USER), 77 71 [stack_top] "r" ((uint8_t *) kernel_uarg->uspace_stack + 78 72 kernel_uarg->uspace_stack_size), 79 [ ipl] "r" (ipl),73 [eflags] "r" ((eflags & ~(EFLAGS_NT)) | EFLAGS_IF), 80 74 [utext_des] "i" (GDT_SELECTOR(UTEXT_DES) | PL_USER), 81 75 [entry] "r" (kernel_uarg->uspace_entry),
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