Changeset 0cf1dcf in mainline for kernel/arch/sparc64/src/start.S
- Timestamp:
- 2006-11-28T23:03:04Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 058b021
- Parents:
- d4b5542
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/start.S
rd4b5542 r0cf1dcf 65 65 kernel_image_start: 66 66 mov BSP_FLAG, %l0 67 and %o0, %l0, %l7 68 andn %o0, %l0, %l6 67 and %o0, %l0, %l7 ! l7 <= bootstrap processor? 68 andn %o0, %l0, %l6 ! l6 <= start of physical memory 69 69 70 70 ! Get bits 40:13 of physmem_base. 71 71 srlx %l6, 13, %l5 72 72 sllx %l5, 13 + (63 - 40), %l5 73 srlx %l5, 63 - 40, %l5 73 srlx %l5, 63 - 40, %l5 ! l5 <= physmem_base[40:13] 74 74 75 75 /*
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