Changeset 0abc2ae in mainline for kernel/arch/ppc32/include
- Timestamp:
- 2018-08-13T00:11:39Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f34d2be
- Parents:
- 05882233
- File:
-
- 1 edited
-
kernel/arch/ppc32/include/arch/barrier.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ppc32/include/arch/barrier.h
r05882233 r0abc2ae 62 62 */ 63 63 64 NO_TRACE static inline void smc_coherence(void *addr) 65 { 66 asm volatile ( 67 "dcbst 0, %[addr]\n" 68 "sync\n" 69 "icbi 0, %[addr]\n" 70 "sync\n" 71 "isync\n" 72 :: [addr] "r" (addr) 73 ); 74 } 75 76 NO_TRACE static inline void smc_coherence_block(void *addr, unsigned int len) 64 NO_TRACE static inline void smc_coherence(void *addr, unsigned int len) 77 65 { 78 66 unsigned int i;
Note:
See TracChangeset
for help on using the changeset viewer.
