Changeset 09ab0a9a in mainline for kernel/arch/arm32/src/cpu
- Timestamp:
- 2018-09-13T12:05:53Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cc74cb5
- Parents:
- b2aaaa0
- git-author:
- Jiri Svoboda <jiri@…> (2018-09-13 07:09:46)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-09-13 12:05:53)
- File:
-
- 1 edited
-
kernel/arch/arm32/src/cpu/cpu.c (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
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kernel/arch/arm32/src/cpu/cpu.c
rb2aaaa0 r09ab0a9a 60 60 static unsigned dcache_linesize_log(unsigned level); 61 61 62 63 62 /** Implementers (vendor) names */ 64 63 static const char *implementer(unsigned id) … … 99 98 return arch_data[0]; 100 99 } 101 102 100 103 101 /** Retrieves processor identification from CP15 register 0. … … 317 315 } 318 316 319 320 317 void cpu_dcache_flush(void) 321 318 {
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