Changeset 09ab0a9a in mainline for kernel/arch/arm32/include
- Timestamp:
- 2018-09-13T12:05:53Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cc74cb5
- Parents:
- b2aaaa0
- git-author:
- Jiri Svoboda <jiri@…> (2018-09-13 07:09:46)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-09-13 12:05:53)
- Location:
- kernel/arch/arm32/include/arch
- Files:
-
- 11 edited
-
context_struct.h (modified) (1 diff)
-
cp15.h (modified) (1 diff)
-
istate_struct.h (modified) (1 diff)
-
mach/beagleboardxm/beagleboardxm.h (modified) (1 diff)
-
mach/beaglebone/beaglebone.h (modified) (1 diff)
-
mach/integratorcp/integratorcp.h (modified) (1 diff)
-
machine_func.h (modified) (2 diffs)
-
mm/page.h (modified) (1 diff)
-
mm/page_armv4.h (modified) (4 diffs)
-
mm/page_armv6.h (modified) (5 diffs)
-
mm/page_fault.h (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/context_struct.h
rb2aaaa0 r09ab0a9a 55 55 56 56 #endif 57 -
kernel/arch/arm32/include/arch/cp15.h
rb2aaaa0 r09ab0a9a 584 584 CONTROL_REG_GEN_WRITE(PMCCNTR, c9, 0, c13, 0); 585 585 586 587 586 /*c10 has tons of reserved too */ 588 587 CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */ -
kernel/arch/arm32/include/arch/istate_struct.h
rb2aaaa0 r09ab0a9a 56 56 57 57 #endif 58 -
kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h
rb2aaaa0 r09ab0a9a 46 46 /** @} 47 47 */ 48 -
kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h
rb2aaaa0 r09ab0a9a 46 46 /** @} 47 47 */ 48 -
kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h
rb2aaaa0 r09ab0a9a 97 97 } icp_hw_map_t; 98 98 99 100 99 extern void icp_init(void); 101 100 extern void icp_output_init(void); -
kernel/arch/arm32/include/arch/machine_func.h
rb2aaaa0 r09ab0a9a 68 68 extern void machine_init(void); 69 69 70 71 70 /** Starts timer. */ 72 71 extern void machine_timer_irq_start(void); 73 74 72 75 73 /** Halts CPU. */ … … 89 87 */ 90 88 extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); 91 92 89 93 90 /* -
kernel/arch/arm32/include/arch/mm/page.h
rb2aaaa0 r09ab0a9a 131 131 set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) 132 132 133 134 133 #define pt_coherence(page) pt_coherence_m(page, 1) 135 134 -
kernel/arch/arm32/include/arch/mm/page_armv4.h
rb2aaaa0 r09ab0a9a 113 113 #define PTE_AP_USER_RW_KERNEL_RW 3 114 114 115 116 115 /* pte_level0_t and pte_level1_t descriptor_type flags */ 117 116 … … 195 194 } 196 195 } 197 198 196 199 197 /** Sets flags of level 1 page table entry. … … 247 245 } 248 246 249 250 247 NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) 251 248 { … … 255 252 } 256 253 257 258 254 extern void page_arch_init(void); 259 255 260 261 256 #endif /* __ASSEMBLER__ */ 262 257 -
kernel/arch/arm32/include/arch/mm/page_armv6.h
rb2aaaa0 r09ab0a9a 40 40 #error "Do not include arch specific page.h directly use generic page.h instead" 41 41 #endif 42 43 42 44 43 /* Macros for querying the last-level PTE entries. */ … … 112 111 #define PTE_AP1_RO 1 113 112 114 115 113 /* pte_level0_t and pte_level1_t descriptor_type flags */ 116 114 … … 126 124 /** pte_level1_t small page table flag with NX (used in descriptor type). */ 127 125 #define PTE_DESCRIPTOR_SMALL_PAGE_NX 3 128 129 126 130 127 /** … … 230 227 pt_coherence(p); 231 228 } 232 233 229 234 230 /** Sets flags of level 1 page table entry. … … 319 315 } 320 316 321 322 317 extern void page_arch_init(void); 323 318 -
kernel/arch/arm32/include/arch/mm/page_fault.h
rb2aaaa0 r09ab0a9a 39 39 #include <stdint.h> 40 40 41 42 41 /** Decribes CP15 "fault status register" (FSR). 43 42 * … … 71 70 } fault_status_t; 72 71 73 74 72 /** Simplified description of instruction code. 75 73 * … … 88 86 } ATTRIBUTE_PACKED instruction_t; 89 87 90 91 88 /** Help union used for casting pc register (uint_32_t) value into 92 89 * #instruction_t pointer.
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