Changeset 00aece0 in mainline for kernel/arch/arm32/src
- Timestamp:
- 2012-02-18T16:47:38Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4449c6c
- Parents:
- bd5f3b7 (diff), f943dd3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch/arm32/src
- Files:
-
- 1 added
- 8 edited
-
arm32.c (modified) (2 diffs)
-
mach/gta02/gta02.c (modified) (4 diffs)
-
mach/integratorcp/integratorcp.c (modified) (5 diffs)
-
mach/testarm/testarm.c (modified) (4 diffs)
-
machine_func.c (modified) (1 diff)
-
mm/frame.c (modified) (2 diffs)
-
mm/km.c (added)
-
mm/page.c (modified) (4 diffs)
-
ras.c (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/arm32.c
rbd5f3b7 r00aece0 38 38 #include <genarch/fb/fb.h> 39 39 #include <abi/fb/visuals.h> 40 #include <sysinfo/sysinfo.h>41 40 #include <console/console.h> 42 41 #include <ddi/irq.h> … … 58 57 size_t i; 59 58 for (i = 0; i < init.cnt; i++) { 60 init.tasks[i]. addr = (uintptr_t) bootinfo->tasks[i].addr;59 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr); 61 60 init.tasks[i].size = bootinfo->tasks[i].size; 62 61 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, -
kernel/arch/arm32/src/mach/gta02/gta02.c
rbd5f3b7 r00aece0 38 38 #include <arch/mm/page.h> 39 39 #include <mm/page.h> 40 #include <mm/km.h> 40 41 #include <genarch/fb/fb.h> 41 42 #include <abi/fb/visuals.h> … … 65 66 static void gta02_timer_irq_start(void); 66 67 static void gta02_cpu_halt(void); 67 static void gta02_get_memory_extents(uintptr_t *start, uintptr_t *size);68 static void gta02_get_memory_extents(uintptr_t *start, size_t *size); 68 69 static void gta02_irq_exception(unsigned int exc_no, istate_t *istate); 69 70 static void gta02_frame_init(void); … … 101 102 s3c24xx_irqc_regs_t *irqc_regs; 102 103 103 gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE); 104 irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE); 104 gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE, 105 PAGE_NOT_CACHEABLE); 106 irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE, 107 PAGE_NOT_CACHEABLE); 105 108 106 109 /* Initialize interrupt controller. */ … … 123 126 * @param size Place to store memory size. 124 127 */ 125 static void gta02_get_memory_extents(uintptr_t *start, uintptr_t *size)128 static void gta02_get_memory_extents(uintptr_t *start, size_t *size) 126 129 { 127 130 *start = GTA02_MEMORY_START + GTA02_MEMORY_SKIP; -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
rbd5f3b7 r00aece0 45 45 #include <mm/page.h> 46 46 #include <mm/frame.h> 47 #include <mm/km.h> 47 48 #include <arch/mm/frame.h> 48 49 #include <arch/mach/integratorcp/integratorcp.h> … … 128 129 void icp_init(void) 129 130 { 130 icp_hw_map.uart = hw_map(ICP_UART, PAGE_SIZE); 131 icp_hw_map.kbd_ctrl = hw_map(ICP_KBD, PAGE_SIZE); 131 icp_hw_map.uart = km_map(ICP_UART, PAGE_SIZE, 132 PAGE_WRITE | PAGE_NOT_CACHEABLE); 133 icp_hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE); 132 134 icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT; 133 135 icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA; 134 136 icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT; 135 icp_hw_map.rtc = hw_map(ICP_RTC, PAGE_SIZE); 137 icp_hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, 138 PAGE_WRITE | PAGE_NOT_CACHEABLE); 136 139 icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET; 137 140 icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET; … … 141 144 icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET; 142 145 143 icp_hw_map.irqc = hw_map(ICP_IRQC, PAGE_SIZE); 146 icp_hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, 147 PAGE_WRITE | PAGE_NOT_CACHEABLE); 144 148 icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET; 145 149 icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET; 146 icp_hw_map.cmcr = hw_map(ICP_CMCR, PAGE_SIZE); 150 icp_hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, 151 PAGE_WRITE | PAGE_NOT_CACHEABLE); 147 152 icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET; 148 icp_hw_map.vga = hw_map(ICP_VGA, PAGE_SIZE); 153 icp_hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, 154 PAGE_WRITE | PAGE_NOT_CACHEABLE); 149 155 150 156 hw_map_init_called = true; … … 220 226 * @param size Place to store memory size. 221 227 */ 222 void icp_get_memory_extents(uintptr_t *start, uintptr_t *size)228 void icp_get_memory_extents(uintptr_t *start, size_t *size) 223 229 { 224 230 *start = 0; … … 326 332 sysinfo_set_item_val("kbd", NULL, true); 327 333 sysinfo_set_item_val("kbd.inr", NULL, ICP_KBD_IRQ); 328 sysinfo_set_item_val("kbd.address.status", NULL, 329 (uintptr_t) icp_hw_map.kbd_stat); 330 sysinfo_set_item_val("kbd.address.data", NULL, 331 (uintptr_t) icp_hw_map.kbd_data); 334 sysinfo_set_item_val("kbd.address.physical", NULL, 335 ICP_KBD); 332 336 333 337 } -
kernel/arch/arm32/src/mach/testarm/testarm.c
rbd5f3b7 r00aece0 37 37 #include <arch/mach/testarm/testarm.h> 38 38 #include <mm/page.h> 39 #include <mm/km.h> 39 40 #include <genarch/fb/fb.h> 40 41 #include <abi/fb/visuals.h> … … 71 72 void gxemul_init(void) 72 73 { 73 gxemul_kbd = (void *) hw_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE); 74 gxemul_rtc = (void *) hw_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE); 75 gxemul_irqc = (void *) hw_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE); 74 gxemul_kbd = (void *) km_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE, 75 PAGE_WRITE | PAGE_NOT_CACHEABLE); 76 gxemul_rtc = (void *) km_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE, 77 PAGE_WRITE | PAGE_NOT_CACHEABLE); 78 gxemul_irqc = (void *) km_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE, 79 PAGE_WRITE | PAGE_NOT_CACHEABLE); 76 80 } 77 81 … … 124 128 sysinfo_set_item_val("kbd", NULL, true); 125 129 sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); 126 sysinfo_set_item_val("kbd.address.virtual", NULL, (sysarg_t) gxemul_kbd); 130 sysinfo_set_item_val("kbd.address.physical", NULL, 131 GXEMUL_KBD_ADDRESS); 127 132 #endif 128 133 } … … 202 207 * @param size Place to store memory size. 203 208 */ 204 void gxemul_get_memory_extents(uintptr_t *start, uintptr_t *size)209 void gxemul_get_memory_extents(uintptr_t *start, size_t *size) 205 210 { 206 211 *start = 0; 207 *size = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET));212 *size = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET)); 208 213 } 209 214 -
kernel/arch/arm32/src/machine_func.c
rbd5f3b7 r00aece0 85 85 * @param size Place to store memory size. 86 86 */ 87 void machine_get_memory_extents(uintptr_t *start, uintptr_t *size)87 void machine_get_memory_extents(uintptr_t *start, size_t *size) 88 88 { 89 89 (machine_ops->machine_get_memory_extents)(start, size); -
kernel/arch/arm32/src/mm/frame.c
rbd5f3b7 r00aece0 39 39 #include <config.h> 40 40 #include <align.h> 41 #include <macros.h> 41 42 42 /** Address of the last frame in the memory. */ 43 uintptr_t last_frame = 0; 43 static void frame_common_arch_init(bool low) 44 { 45 uintptr_t base; 46 size_t size; 44 47 45 /** Creates memory zones. */ 46 void frame_arch_init(void) 48 machine_get_memory_extents(&base, &size); 49 base = ALIGN_UP(base, FRAME_SIZE); 50 size = ALIGN_DOWN(size, FRAME_SIZE); 51 52 if (!frame_adjust_zone_bounds(low, &base, &size)) 53 return; 54 55 if (low) { 56 zone_create(ADDR2PFN(base), SIZE2FRAMES(size), 57 BOOT_PAGE_TABLE_START_FRAME + 58 BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 59 ZONE_AVAILABLE | ZONE_LOWMEM); 60 } else { 61 pfn_t conf = zone_external_conf_alloc(SIZE2FRAMES(size)); 62 if (conf != 0) 63 zone_create(ADDR2PFN(base), SIZE2FRAMES(size), conf, 64 ZONE_AVAILABLE | ZONE_HIGHMEM); 65 } 66 67 } 68 69 /** Create low memory zones. */ 70 void frame_low_arch_init(void) 47 71 { 48 uintptr_t mem_start, mem_size; 49 uintptr_t first_frame; 50 uintptr_t num_frames; 72 frame_common_arch_init(true); 51 73 52 machine_get_memory_extents(&mem_start, &mem_size);53 first_frame = ALIGN_UP(mem_start, FRAME_SIZE);54 last_frame = ALIGN_DOWN(mem_start + mem_size, FRAME_SIZE);55 num_frames = (last_frame - first_frame) >> FRAME_WIDTH;56 57 /* All memory as one zone */58 zone_create(first_frame >> FRAME_WIDTH, num_frames,59 BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);60 61 74 /* blacklist boot page table */ 62 75 frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME, … … 64 77 65 78 machine_frame_init(); 79 } 80 81 /** Create high memory zones. */ 82 void frame_high_arch_init(void) 83 { 84 frame_common_arch_init(false); 66 85 } 67 86 -
kernel/arch/arm32/src/mm/page.c
rbd5f3b7 r00aece0 37 37 #include <genarch/mm/page_pt.h> 38 38 #include <mm/page.h> 39 #include <arch/mm/frame.h> 39 40 #include <align.h> 40 41 #include <config.h> … … 42 43 #include <typedefs.h> 43 44 #include <interrupt.h> 44 #include < arch/mm/frame.h>45 #include <macros.h> 45 46 46 47 /** Initializes page tables. … … 57 58 58 59 uintptr_t cur; 60 59 61 /* Kernel identity mapping */ 60 for (cur = PHYSMEM_START_ADDR; cur < last_frame; cur += FRAME_SIZE) 62 for (cur = PHYSMEM_START_ADDR; 63 cur < min(config.identity_size, config.physmem_end); 64 cur += FRAME_SIZE) 61 65 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 62 66 67 #ifdef HIGH_EXCEPTION_VECTORS 63 68 /* Create mapping for exception table at high offset */ 64 #ifdef HIGH_EXCEPTION_VECTORS 65 void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA); 66 page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags); 69 uintptr_t ev_frame = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_NONE); 70 page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, ev_frame, flags); 67 71 #else 68 72 #error "Only high exception vector supported now" 69 73 #endif 70 cur = ALIGN_DOWN(0x50008010, FRAME_SIZE);71 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);72 74 73 75 page_table_unlock(AS_KERNEL, true); … … 78 80 } 79 81 80 /** Maps device into the kernel space.81 *82 * Maps physical address of device into kernel virtual address space (so it can83 * be accessed only by kernel through virtual address).84 *85 * @param physaddr Physical address where device is connected.86 * @param size Length of area where device is present.87 *88 * @return Virtual address where device will be accessible.89 */90 uintptr_t hw_map(uintptr_t physaddr, size_t size)91 {92 if (last_frame + ALIGN_UP(size, PAGE_SIZE) >93 KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {94 panic("Unable to map physical memory %p (%d bytes).",95 (void *) physaddr, size);96 }97 98 uintptr_t virtaddr = PA2KA(last_frame);99 pfn_t i;100 101 page_table_lock(AS_KERNEL, true);102 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {103 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),104 physaddr + PFN2ADDR(i),105 PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);106 }107 page_table_unlock(AS_KERNEL, true);108 109 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);110 return virtaddr;111 }112 113 82 /** @} 114 83 */ -
kernel/arch/arm32/src/ras.c
rbd5f3b7 r00aece0 38 38 #include <mm/frame.h> 39 39 #include <mm/page.h> 40 #include <mm/km.h> 40 41 #include <mm/tlb.h> 41 42 #include <mm/asid.h> … … 50 51 void ras_init(void) 51 52 { 52 ras_page = frame_alloc(ONE_FRAME, FRAME_KA); 53 memsetb(ras_page, FRAME_SIZE, 0); 53 uintptr_t frame; 54 55 frame = (uintptr_t) frame_alloc(ONE_FRAME, 56 FRAME_ATOMIC | FRAME_HIGHMEM); 57 if (!frame) 58 frame = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_LOWMEM); 59 ras_page = (uintptr_t *) km_map(frame, 60 PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 61 62 memsetb(ras_page, PAGE_SIZE, 0); 54 63 ras_page[RAS_START] = 0; 55 64 ras_page[RAS_END] = 0xffffffff; 56 /*57 * Userspace needs to be able to write to this page. The page is58 * cached in TLB as PAGE_KERNEL. Purge it from TLB and map it59 * read/write PAGE_USER.60 */61 tlb_invalidate_pages(ASID_KERNEL, (uintptr_t)ras_page, 1);62 page_table_lock(AS, true);63 page_mapping_insert(AS, (uintptr_t)ras_page, (uintptr_t)KA2PA(ras_page),64 PAGE_READ | PAGE_WRITE | PAGE_USER);65 page_table_unlock(AS, true);66 65 } 67 66 … … 86 85 } 87 86 87 /** @} 88 */
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