source: mainline/uspace/srv/hw/netif/ne2000/dp8390.c@ 164c653

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 164c653 was 8f17503, checked in by Jakub Jermar <jakub@…>, 15 years ago

When dropping a packet, drop also the sq_mutex, otherwise the next
invocation of ne2k_send() will self-deadlock.
  • Property mode set to 100644
File size: 16.8 KB
Line 
1/*
2 * Copyright (c) 2009 Lukas Mejdrech
3 * Copyright (c) 2011 Martin Decky
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
31 * This code is based upon the NE2000 driver for MINIX,
32 * distributed according to a BSD-style license.
33 *
34 * Copyright (c) 1987, 1997, 2006 Vrije Universiteit
35 * Copyright (c) 1992, 1994 Philip Homburg
36 * Copyright (c) 1996 G. Falzoni
37 *
38 */
39
40/** @addtogroup ne2000
41 * @{
42 */
43
44/** @file
45 *
46 * NE2000 (based on DP8390) network interface core implementation.
47 * Only the basic NE2000 PIO (ISA) interface is supported, remote
48 * DMA is completely absent from this code for simplicity.
49 *
50 */
51
52#include <assert.h>
53#include <byteorder.h>
54#include <errno.h>
55#include <libarch/ddi.h>
56#include <net/packet.h>
57#include <packet_client.h>
58#include "dp8390.h"
59
60/** Page size */
61#define DP_PAGE 256
62
63/** 6 * DP_PAGE >= 1514 bytes */
64#define SQ_PAGES 6
65
66/* NE2000 implementation. */
67
68/** NE2000 Data Register */
69#define NE2K_DATA 0x0010
70
71/** NE2000 Reset register */
72#define NE2K_RESET 0x001f
73
74/** NE2000 data start */
75#define NE2K_START 0x4000
76
77/** NE2000 data size */
78#define NE2K_SIZE 0x4000
79
80/** NE2000 retry count */
81#define NE2K_RETRY 0x1000
82
83/** NE2000 error messages rate limiting */
84#define NE2K_ERL 10
85
86/** Minimum Ethernet packet size in bytes */
87#define ETH_MIN_PACK_SIZE 60
88
89/** Maximum Ethernet packet size in bytes */
90#define ETH_MAX_PACK_SIZE_TAGGED 1518
91
92/** Type definition of the receive header
93 *
94 */
95typedef struct {
96 /** Copy of RSR */
97 uint8_t status;
98
99 /** Pointer to next packet */
100 uint8_t next;
101
102 /** Receive Byte Count Low */
103 uint8_t rbcl;
104
105 /** Receive Byte Count High */
106 uint8_t rbch;
107} recv_header_t;
108
109/** Read a memory block word by word.
110 *
111 * @param[in] port Source address.
112 * @param[out] buf Destination buffer.
113 * @param[in] size Memory block size in bytes.
114 *
115 */
116static void pio_read_buf_16(void *port, void *buf, size_t size)
117{
118 size_t i;
119
120 for (i = 0; (i << 1) < size; i++)
121 *((uint16_t *) buf + i) = pio_read_16((ioport16_t *) (port));
122}
123
124/** Write a memory block word by word.
125 *
126 * @param[in] port Destination address.
127 * @param[in] buf Source buffer.
128 * @param[in] size Memory block size in bytes.
129 *
130 */
131static void pio_write_buf_16(void *port, void *buf, size_t size)
132{
133 size_t i;
134
135 for (i = 0; (i << 1) < size; i++)
136 pio_write_16((ioport16_t *) port, *((uint16_t *) buf + i));
137}
138
139static void ne2k_download(ne2k_t *ne2k, void *buf, size_t addr, size_t size)
140{
141 size_t esize = size & ~1;
142
143 pio_write_8(ne2k->port + DP_RBCR0, esize & 0xff);
144 pio_write_8(ne2k->port + DP_RBCR1, (esize >> 8) & 0xff);
145 pio_write_8(ne2k->port + DP_RSAR0, addr & 0xff);
146 pio_write_8(ne2k->port + DP_RSAR1, (addr >> 8) & 0xff);
147 pio_write_8(ne2k->port + DP_CR, CR_DM_RR | CR_PS_P0 | CR_STA);
148
149 if (esize != 0) {
150 pio_read_buf_16(ne2k->data_port, buf, esize);
151 size -= esize;
152 buf += esize;
153 }
154
155 if (size) {
156 assert(size == 1);
157
158 uint16_t word = pio_read_16(ne2k->data_port);
159 memcpy(buf, &word, 1);
160 }
161}
162
163static void ne2k_upload(ne2k_t *ne2k, void *buf, size_t addr, size_t size)
164{
165 size_t esize = size & ~1;
166
167 pio_write_8(ne2k->port + DP_RBCR0, esize & 0xff);
168 pio_write_8(ne2k->port + DP_RBCR1, (esize >> 8) & 0xff);
169 pio_write_8(ne2k->port + DP_RSAR0, addr & 0xff);
170 pio_write_8(ne2k->port + DP_RSAR1, (addr >> 8) & 0xff);
171 pio_write_8(ne2k->port + DP_CR, CR_DM_RW | CR_PS_P0 | CR_STA);
172
173 if (esize != 0) {
174 pio_write_buf_16(ne2k->data_port, buf, esize);
175 size -= esize;
176 buf += esize;
177 }
178
179 if (size) {
180 assert(size == 1);
181
182 uint16_t word = 0;
183
184 memcpy(&word, buf, 1);
185 pio_write_16(ne2k->data_port, word);
186 }
187}
188
189static void ne2k_init(ne2k_t *ne2k)
190{
191 unsigned int i;
192
193 /* Reset the ethernet card */
194 uint8_t val = pio_read_8(ne2k->port + NE2K_RESET);
195 usleep(2000);
196 pio_write_8(ne2k->port + NE2K_RESET, val);
197 usleep(2000);
198
199 /* Reset the DP8390 */
200 pio_write_8(ne2k->port + DP_CR, CR_STP | CR_DM_ABORT);
201 for (i = 0; i < NE2K_RETRY; i++) {
202 if (pio_read_8(ne2k->port + DP_ISR) != 0)
203 break;
204 }
205}
206
207/** Probe and initialize the network interface.
208 *
209 * @param[in,out] ne2k Network interface structure.
210 * @param[in] port Device address.
211 * @param[in] irq Device interrupt vector.
212 *
213 * @return EOK on success.
214 * @return EXDEV if the network interface was not recognized.
215 *
216 */
217int ne2k_probe(ne2k_t *ne2k, void *port, int irq)
218{
219 unsigned int i;
220
221 /* General initialization */
222 ne2k->port = port;
223 ne2k->data_port = ne2k->port + NE2K_DATA;
224 ne2k->irq = irq;
225 ne2k->probed = false;
226 ne2k->up = false;
227
228 ne2k_init(ne2k);
229
230 /* Check if the DP8390 is really there */
231 uint8_t val = pio_read_8(ne2k->port + DP_CR);
232 if ((val & (CR_STP | CR_DM_ABORT)) != (CR_STP | CR_DM_ABORT))
233 return EXDEV;
234
235 /* Disable the receiver and init TCR and DCR */
236 pio_write_8(ne2k->port + DP_RCR, RCR_MON);
237 pio_write_8(ne2k->port + DP_TCR, TCR_NORMAL);
238 pio_write_8(ne2k->port + DP_DCR, DCR_WORDWIDE | DCR_8BYTES | DCR_BMS);
239
240 /* Setup a transfer to get the MAC address */
241 pio_write_8(ne2k->port + DP_RBCR0, ETH_ADDR << 1);
242 pio_write_8(ne2k->port + DP_RBCR1, 0);
243 pio_write_8(ne2k->port + DP_RSAR0, 0);
244 pio_write_8(ne2k->port + DP_RSAR1, 0);
245 pio_write_8(ne2k->port + DP_CR, CR_DM_RR | CR_PS_P0 | CR_STA);
246
247 for (i = 0; i < ETH_ADDR; i++)
248 ne2k->mac[i] = pio_read_16(ne2k->data_port);
249
250 ne2k->probed = true;
251 return EOK;
252}
253
254/** Start the network interface.
255 *
256 * @param[in,out] ne2k Network interface structure.
257 *
258 * @return EOK on success.
259 * @return EXDEV if the network interface is disabled.
260 *
261 */
262int ne2k_up(ne2k_t *ne2k)
263{
264 if (!ne2k->probed)
265 return EXDEV;
266
267 ne2k_init(ne2k);
268
269 /*
270 * Setup send queue. Use the first
271 * SQ_PAGES of NE2000 memory for the send
272 * buffer.
273 */
274 ne2k->sq.dirty = false;
275 ne2k->sq.page = NE2K_START / DP_PAGE;
276 fibril_mutex_initialize(&ne2k->sq_mutex);
277 fibril_condvar_initialize(&ne2k->sq_cv);
278
279 /*
280 * Setup receive ring buffer. Use all the rest
281 * of the NE2000 memory (except the first SQ_PAGES
282 * reserved for the send buffer) for the receive
283 * ring buffer.
284 */
285 ne2k->start_page = ne2k->sq.page + SQ_PAGES;
286 ne2k->stop_page = ne2k->sq.page + NE2K_SIZE / DP_PAGE;
287
288 /*
289 * Initialization of the DP8390 following the mandatory procedure
290 * in reference manual ("DP8390D/NS32490D NIC Network Interface
291 * Controller", National Semiconductor, July 1995, Page 29).
292 */
293
294 /* Step 1: */
295 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_STP | CR_DM_ABORT);
296
297 /* Step 2: */
298 pio_write_8(ne2k->port + DP_DCR, DCR_WORDWIDE | DCR_8BYTES | DCR_BMS);
299
300 /* Step 3: */
301 pio_write_8(ne2k->port + DP_RBCR0, 0);
302 pio_write_8(ne2k->port + DP_RBCR1, 0);
303
304 /* Step 4: */
305 pio_write_8(ne2k->port + DP_RCR, RCR_AB);
306
307 /* Step 5: */
308 pio_write_8(ne2k->port + DP_TCR, TCR_INTERNAL);
309
310 /* Step 6: */
311 pio_write_8(ne2k->port + DP_BNRY, ne2k->start_page);
312 pio_write_8(ne2k->port + DP_PSTART, ne2k->start_page);
313 pio_write_8(ne2k->port + DP_PSTOP, ne2k->stop_page);
314
315 /* Step 7: */
316 pio_write_8(ne2k->port + DP_ISR, 0xff);
317
318 /* Step 8: */
319 pio_write_8(ne2k->port + DP_IMR,
320 IMR_PRXE | IMR_PTXE | IMR_RXEE | IMR_TXEE | IMR_OVWE | IMR_CNTE);
321
322 /* Step 9: */
323 pio_write_8(ne2k->port + DP_CR, CR_PS_P1 | CR_DM_ABORT | CR_STP);
324
325 pio_write_8(ne2k->port + DP_PAR0, ne2k->mac[0]);
326 pio_write_8(ne2k->port + DP_PAR1, ne2k->mac[1]);
327 pio_write_8(ne2k->port + DP_PAR2, ne2k->mac[2]);
328 pio_write_8(ne2k->port + DP_PAR3, ne2k->mac[3]);
329 pio_write_8(ne2k->port + DP_PAR4, ne2k->mac[4]);
330 pio_write_8(ne2k->port + DP_PAR5, ne2k->mac[5]);
331
332 pio_write_8(ne2k->port + DP_MAR0, 0xff);
333 pio_write_8(ne2k->port + DP_MAR1, 0xff);
334 pio_write_8(ne2k->port + DP_MAR2, 0xff);
335 pio_write_8(ne2k->port + DP_MAR3, 0xff);
336 pio_write_8(ne2k->port + DP_MAR4, 0xff);
337 pio_write_8(ne2k->port + DP_MAR5, 0xff);
338 pio_write_8(ne2k->port + DP_MAR6, 0xff);
339 pio_write_8(ne2k->port + DP_MAR7, 0xff);
340
341 pio_write_8(ne2k->port + DP_CURR, ne2k->start_page + 1);
342
343 /* Step 10: */
344 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_DM_ABORT | CR_STA);
345
346 /* Step 11: */
347 pio_write_8(ne2k->port + DP_TCR, TCR_NORMAL);
348
349 /* Reset counters by reading */
350 pio_read_8(ne2k->port + DP_CNTR0);
351 pio_read_8(ne2k->port + DP_CNTR1);
352 pio_read_8(ne2k->port + DP_CNTR2);
353
354 /* Finish the initialization */
355 ne2k->up = true;
356 return EOK;
357}
358
359/** Stop the network interface.
360 *
361 * @param[in,out] ne2k Network interface structure.
362 *
363 */
364void ne2k_down(ne2k_t *ne2k)
365{
366 if ((ne2k->probed) && (ne2k->up)) {
367 pio_write_8(ne2k->port + DP_CR, CR_STP | CR_DM_ABORT);
368 ne2k_init(ne2k);
369 ne2k->up = false;
370 }
371}
372
373/** Send a frame.
374 *
375 * @param[in,out] ne2k Network interface structure.
376 * @param[in] packet Frame to be sent.
377 *
378 */
379void ne2k_send(ne2k_t *ne2k, packet_t *packet)
380{
381 assert(ne2k->probed);
382 assert(ne2k->up);
383
384 fibril_mutex_lock(&ne2k->sq_mutex);
385
386 while (ne2k->sq.dirty)
387 fibril_condvar_wait(&ne2k->sq_cv, &ne2k->sq_mutex);
388
389 void *buf = packet_get_data(packet);
390 size_t size = packet_get_data_length(packet);
391
392 if ((size < ETH_MIN_PACK_SIZE) || (size > ETH_MAX_PACK_SIZE_TAGGED)) {
393 fibril_mutex_unlock(&ne2k->sq_mutex);
394 fprintf(stderr, "%s: Frame dropped (invalid size %zu bytes)\n",
395 NAME, size);
396 return;
397 }
398
399 /* Upload the frame to the ethernet card */
400 ne2k_upload(ne2k, buf, ne2k->sq.page * DP_PAGE, size);
401 ne2k->sq.dirty = true;
402 ne2k->sq.size = size;
403
404 /* Initialize the transfer */
405 pio_write_8(ne2k->port + DP_TPSR, ne2k->sq.page);
406 pio_write_8(ne2k->port + DP_TBCR0, size & 0xff);
407 pio_write_8(ne2k->port + DP_TBCR1, (size >> 8) & 0xff);
408 pio_write_8(ne2k->port + DP_CR, CR_TXP | CR_STA);
409
410 fibril_mutex_unlock(&ne2k->sq_mutex);
411}
412
413static void ne2k_reset(ne2k_t *ne2k)
414{
415 unsigned int i;
416
417 /* Stop the chip */
418 pio_write_8(ne2k->port + DP_CR, CR_STP | CR_DM_ABORT);
419 pio_write_8(ne2k->port + DP_RBCR0, 0);
420 pio_write_8(ne2k->port + DP_RBCR1, 0);
421
422 for (i = 0; i < NE2K_RETRY; i++) {
423 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RST) != 0)
424 break;
425 }
426
427 pio_write_8(ne2k->port + DP_TCR, TCR_1EXTERNAL | TCR_OFST);
428 pio_write_8(ne2k->port + DP_CR, CR_STA | CR_DM_ABORT);
429 pio_write_8(ne2k->port + DP_TCR, TCR_NORMAL);
430
431 /* Acknowledge the ISR_RDC (remote DMA) interrupt */
432 for (i = 0; i < NE2K_RETRY; i++) {
433 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RDC) != 0)
434 break;
435 }
436
437 uint8_t val = pio_read_8(ne2k->port + DP_ISR);
438 pio_write_8(ne2k->port + DP_ISR, val & ~ISR_RDC);
439
440 /*
441 * Reset the transmit ring. If we were transmitting a frame,
442 * we pretend that the packet is processed. Higher layers will
443 * retransmit if the packet wasn't actually sent.
444 */
445 fibril_mutex_lock(&ne2k->sq_mutex);
446 ne2k->sq.dirty = false;
447 fibril_mutex_unlock(&ne2k->sq_mutex);
448}
449
450static frame_t *ne2k_receive_frame(ne2k_t *ne2k, uint8_t page, size_t length)
451{
452 frame_t *frame = (frame_t *) malloc(sizeof(frame_t));
453 if (frame == NULL)
454 return NULL;
455
456 link_initialize(&frame->link);
457
458 frame->packet = netif_packet_get_1(length);
459 if (frame->packet == NULL) {
460 free(frame);
461 return NULL;
462 }
463
464 void *buf = packet_suffix(frame->packet, length);
465 bzero(buf, length);
466 uint8_t last = page + length / DP_PAGE;
467
468 if (last >= ne2k->stop_page) {
469 size_t left = (ne2k->stop_page - page) * DP_PAGE
470 - sizeof(recv_header_t);
471
472 ne2k_download(ne2k, buf, page * DP_PAGE + sizeof(recv_header_t),
473 left);
474 ne2k_download(ne2k, buf + left, ne2k->start_page * DP_PAGE,
475 length - left);
476 } else
477 ne2k_download(ne2k, buf, page * DP_PAGE + sizeof(recv_header_t),
478 length);
479
480 ne2k->stats.receive_packets++;
481 return frame;
482}
483
484static link_t *ne2k_receive(ne2k_t *ne2k)
485{
486 /*
487 * Allocate memory for the list of received frames.
488 * If the allocation fails here we still receive the
489 * frames from the network, but they will be lost.
490 */
491 link_t *frames = (link_t *) malloc(sizeof(link_t));
492 if (frames != NULL)
493 list_initialize(frames);
494
495 while (true) {
496 uint8_t boundary = pio_read_8(ne2k->port + DP_BNRY) + 1;
497
498 if (boundary == ne2k->stop_page)
499 boundary = ne2k->start_page;
500
501 pio_write_8(ne2k->port + DP_CR, CR_PS_P1 | CR_STA);
502 uint8_t current = pio_read_8(ne2k->port + DP_CURR);
503 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_STA);
504
505 if (current == boundary)
506 /* No more frames to process */
507 break;
508
509 recv_header_t header;
510 size_t size = sizeof(header);
511 size_t offset = boundary * DP_PAGE;
512
513 /* Get the frame header */
514 pio_write_8(ne2k->port + DP_RBCR0, size & 0xff);
515 pio_write_8(ne2k->port + DP_RBCR1, (size >> 8) & 0xff);
516 pio_write_8(ne2k->port + DP_RSAR0, offset & 0xff);
517 pio_write_8(ne2k->port + DP_RSAR1, (offset >> 8) & 0xff);
518 pio_write_8(ne2k->port + DP_CR, CR_DM_RR | CR_PS_P0 | CR_STA);
519
520 pio_read_buf_16(ne2k->data_port, (void *) &header, size);
521
522 size_t length =
523 (((size_t) header.rbcl) | (((size_t) header.rbch) << 8)) - size;
524 uint8_t next = header.next;
525
526 if ((length < ETH_MIN_PACK_SIZE)
527 || (length > ETH_MAX_PACK_SIZE_TAGGED)) {
528 fprintf(stderr, "%s: Rant frame (%zu bytes)\n", NAME, length);
529 next = current;
530 } else if ((header.next < ne2k->start_page)
531 || (header.next > ne2k->stop_page)) {
532 fprintf(stderr, "%s: Malformed next frame %u\n", NAME,
533 header.next);
534 next = current;
535 } else if (header.status & RSR_FO) {
536 /*
537 * This is very serious, so we issue a warning and
538 * reset the buffers.
539 */
540 fprintf(stderr, "%s: FIFO overrun\n", NAME);
541 ne2k->overruns++;
542 next = current;
543 } else if ((header.status & RSR_PRX) && (ne2k->up)) {
544 if (frames != NULL) {
545 frame_t *frame = ne2k_receive_frame(ne2k, boundary, length);
546 if (frame != NULL)
547 list_append(&frame->link, frames);
548 }
549 }
550
551 /*
552 * Update the boundary pointer
553 * to the value of the page
554 * prior to the next packet to
555 * be processed.
556 */
557 if (next == ne2k->start_page)
558 next = ne2k->stop_page - 1;
559 else
560 next--;
561
562 pio_write_8(ne2k->port + DP_BNRY, next);
563 }
564
565 return frames;
566}
567
568link_t *ne2k_interrupt(ne2k_t *ne2k, uint8_t isr, uint8_t tsr)
569{
570 /* List of received frames */
571 link_t *frames = NULL;
572
573 if (isr & (ISR_PTX | ISR_TXE)) {
574 if (isr & ISR_TXE)
575 ne2k->stats.send_errors++;
576 else {
577 if (tsr & TSR_PTX)
578 ne2k->stats.send_packets++;
579
580 if (tsr & TSR_COL)
581 ne2k->stats.collisions++;
582
583 if (tsr & TSR_ABT)
584 ne2k->stats.send_aborted_errors++;
585
586 if (tsr & TSR_CRS)
587 ne2k->stats.send_carrier_errors++;
588
589 if (tsr & TSR_FU) {
590 ne2k->underruns++;
591 if (ne2k->underruns < NE2K_ERL)
592 fprintf(stderr, "%s: FIFO underrun\n", NAME);
593 }
594
595 if (tsr & TSR_CDH) {
596 ne2k->stats.send_heartbeat_errors++;
597 if (ne2k->stats.send_heartbeat_errors < NE2K_ERL)
598 fprintf(stderr, "%s: CD heartbeat failure\n", NAME);
599 }
600
601 if (tsr & TSR_OWC)
602 ne2k->stats.send_window_errors++;
603 }
604
605 fibril_mutex_lock(&ne2k->sq_mutex);
606
607 if (ne2k->sq.dirty) {
608 /* Prepare the buffer for next packet */
609 ne2k->sq.dirty = false;
610 ne2k->sq.size = 0;
611
612 /* Signal a next frame to be sent */
613 fibril_condvar_broadcast(&ne2k->sq_cv);
614 } else {
615 ne2k->misses++;
616 if (ne2k->misses < NE2K_ERL)
617 fprintf(stderr, "%s: Spurious PTX interrupt\n", NAME);
618 }
619
620 fibril_mutex_unlock(&ne2k->sq_mutex);
621 }
622
623 if (isr & ISR_RXE)
624 ne2k->stats.receive_errors++;
625
626 if (isr & ISR_CNT) {
627 ne2k->stats.receive_crc_errors +=
628 pio_read_8(ne2k->port + DP_CNTR0);
629 ne2k->stats.receive_frame_errors +=
630 pio_read_8(ne2k->port + DP_CNTR1);
631 ne2k->stats.receive_missed_errors +=
632 pio_read_8(ne2k->port + DP_CNTR2);
633 }
634
635 if (isr & ISR_PRX)
636 frames = ne2k_receive(ne2k);
637
638 if (isr & ISR_RST) {
639 /*
640 * The chip is stopped, and all arrived
641 * frames are delivered.
642 */
643 ne2k_reset(ne2k);
644 }
645
646 /* Unmask interrupts to be processed in the next round */
647 pio_write_8(ne2k->port + DP_IMR,
648 IMR_PRXE | IMR_PTXE | IMR_RXEE | IMR_TXEE | IMR_OVWE | IMR_CNTE);
649
650 return frames;
651}
652
653/** @}
654 */
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