source: mainline/uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c@ 8ff0bd2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8ff0bd2 was 16dc887, checked in by Jiri Svoboda <jiri@…>, 14 years ago

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1/*
2 * Copyright (c) 2010 Jiri Svoboda
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup driver_serial
30 * @{
31 */
32/**
33 * @file
34 * @brief Samsung S3C24xx on-chip UART driver.
35 *
36 * This UART is present on the Samsung S3C24xx CPU (on the gta02 platform).
37 */
38
39#include <ddi.h>
40#include <libarch/ddi.h>
41#include <loc.h>
42#include <ipc/char.h>
43#include <async.h>
44#include <async_obsolete.h>
45#include <unistd.h>
46#include <stdio.h>
47#include <stdlib.h>
48#include <sysinfo.h>
49#include <errno.h>
50#include <inttypes.h>
51#include "s3c24xx_uart.h"
52
53// FIXME: remove this header
54#include <abi/ipc/methods.h>
55
56#define NAME "s3c24ser"
57#define NAMESPACE "char"
58
59static irq_cmd_t uart_irq_cmds[] = {
60 {
61 .cmd = CMD_ACCEPT
62 }
63};
64
65static irq_code_t uart_irq_code = {
66 sizeof(uart_irq_cmds) / sizeof(irq_cmd_t),
67 uart_irq_cmds
68};
69
70/** S3C24xx UART instance structure */
71static s3c24xx_uart_t *uart;
72
73static void s3c24xx_uart_connection(ipc_callid_t iid, ipc_call_t *icall,
74 void *arg);
75static void s3c24xx_uart_irq_handler(ipc_callid_t iid, ipc_call_t *call);
76static int s3c24xx_uart_init(s3c24xx_uart_t *uart);
77static void s3c24xx_uart_sendb(s3c24xx_uart_t *uart, uint8_t byte);
78
79int main(int argc, char *argv[])
80{
81 int rc;
82
83 printf(NAME ": S3C24xx on-chip UART driver\n");
84
85 rc = loc_server_register(NAME, s3c24xx_uart_connection);
86 if (rc < 0) {
87 printf(NAME ": Unable to register server.\n");
88 return -1;
89 }
90
91 uart = malloc(sizeof(s3c24xx_uart_t));
92 if (uart == NULL)
93 return -1;
94
95 if (s3c24xx_uart_init(uart) != EOK)
96 return -1;
97
98 rc = loc_service_register(NAMESPACE "/" NAME, &uart->service_id);
99 if (rc != EOK) {
100 printf(NAME ": Unable to register device %s.\n",
101 NAMESPACE "/" NAME);
102 return -1;
103 }
104
105 printf(NAME ": Registered device %s.\n", NAMESPACE "/" NAME);
106
107 printf(NAME ": Accepting connections\n");
108 task_retval(0);
109 async_manager();
110
111 /* Not reached */
112 return 0;
113}
114
115/** Character device connection handler. */
116static void s3c24xx_uart_connection(ipc_callid_t iid, ipc_call_t *icall,
117 void *arg)
118{
119 ipc_callid_t callid;
120 ipc_call_t call;
121 sysarg_t method;
122 int retval;
123
124 /* Answer the IPC_M_CONNECT_ME_TO call. */
125 async_answer_0(iid, EOK);
126
127 while (1) {
128 callid = async_get_call(&call);
129 method = IPC_GET_IMETHOD(call);
130
131 if (!method) {
132 /* The other side has hung up. */
133 async_answer_0(callid, EOK);
134 return;
135 }
136
137 switch (method) {
138 case IPC_M_CONNECT_TO_ME:
139 printf(NAME ": creating callback connection\n");
140 uart->client_phone = IPC_GET_ARG5(call);
141 retval = 0;
142 break;
143 case CHAR_WRITE_BYTE:
144 printf(NAME ": write %" PRIun " to device\n",
145 IPC_GET_ARG1(call));
146 s3c24xx_uart_sendb(uart, (uint8_t) IPC_GET_ARG1(call));
147 retval = 0;
148 break;
149 default:
150 retval = EINVAL;
151 break;
152 }
153 async_answer_0(callid, retval);
154 }
155}
156
157static void s3c24xx_uart_irq_handler(ipc_callid_t iid, ipc_call_t *call)
158{
159 (void) iid; (void) call;
160
161 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
162 uint32_t data = pio_read_32(&uart->io->urxh) & 0xff;
163 uint32_t status = pio_read_32(&uart->io->uerstat);
164
165 if (uart->client_phone != -1) {
166 async_obsolete_msg_1(uart->client_phone, CHAR_NOTIF_BYTE,
167 data);
168 }
169
170 if (status != 0)
171 printf(NAME ": Error status 0x%x\n", status);
172 }
173}
174
175/** Initialize S3C24xx on-chip UART. */
176static int s3c24xx_uart_init(s3c24xx_uart_t *uart)
177{
178 void *vaddr;
179 sysarg_t inr;
180
181 if (sysinfo_get_value("s3c24xx_uart.address.physical",
182 &uart->paddr) != EOK)
183 return -1;
184
185 if (pio_enable((void *) uart->paddr, sizeof(s3c24xx_uart_io_t),
186 &vaddr) != 0)
187 return -1;
188
189 if (sysinfo_get_value("s3c24xx_uart.inr", &inr) != EOK)
190 return -1;
191
192 uart->io = vaddr;
193 uart->client_phone = -1;
194
195 printf(NAME ": device at physical address %p, inr %" PRIun ".\n",
196 (void *) uart->paddr, inr);
197
198 async_set_interrupt_received(s3c24xx_uart_irq_handler);
199
200 register_irq(inr, device_assign_devno(), 0, &uart_irq_code);
201
202 /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
203 pio_write_32(&uart->io->ufcon, UFCON_FIFO_ENABLE |
204 UFCON_TX_FIFO_TLEVEL_EMPTY | UFCON_RX_FIFO_TLEVEL_1B);
205
206 /* Set RX interrupt to pulse mode */
207 pio_write_32(&uart->io->ucon,
208 pio_read_32(&uart->io->ucon) & ~UCON_RX_INT_LEVEL);
209
210 return EOK;
211}
212
213/** Send a byte to the UART. */
214static void s3c24xx_uart_sendb(s3c24xx_uart_t *uart, uint8_t byte)
215{
216 /* Wait for space becoming available in Tx FIFO. */
217 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0)
218 ;
219
220 pio_write_32(&uart->io->utxh, byte);
221}
222
223/** @}
224 */
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