1 | /*
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2 | * Copyright (c) 2010 Jiri Svoboda
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup genarch
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30 | * @{
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31 | */
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32 | /** @file VIA-CUDA Apple Desktop Bus driver
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33 | *
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34 | * Note: We should really do a full bus scan at the beginning and resolve
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35 | * address conflicts. Also we should consider the handler ID in r3. Instead
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36 | * we just assume a keyboard at address 2 or 8 and a mouse at address 9.
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37 | */
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38 |
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39 | #include <stdio.h>
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40 | #include <stdlib.h>
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41 | #include <sys/types.h>
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42 | #include <bool.h>
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43 | #include <ddi.h>
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44 | #include <libarch/ddi.h>
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45 | #include <loc.h>
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46 | #include <sysinfo.h>
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47 | #include <errno.h>
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48 | #include <ipc/adb.h>
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49 | #include <async.h>
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50 | #include <assert.h>
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51 | #include "cuda_adb.h"
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52 |
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53 | #define NAME "cuda_adb"
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54 |
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55 | static void cuda_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg);
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56 | static int cuda_init(void);
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57 | static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call);
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58 |
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59 | static void cuda_irq_listen(void);
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60 | static void cuda_irq_receive(void);
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61 | static void cuda_irq_rcv_end(void *buf, size_t *len);
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62 | static void cuda_irq_send_start(void);
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63 | static void cuda_irq_send(void);
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64 |
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65 | static void cuda_packet_handle(uint8_t *buf, size_t len);
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66 | static void cuda_send_start(void);
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67 | static void cuda_autopoll_set(bool enable);
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68 |
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69 | static void adb_packet_handle(uint8_t *data, size_t size, bool autopoll);
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70 |
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71 |
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72 | /** B register fields */
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73 | enum {
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74 | TREQ = 0x08,
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75 | TACK = 0x10,
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76 | TIP = 0x20
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77 | };
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78 |
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79 | /** IER register fields */
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80 | enum {
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81 | IER_CLR = 0x00,
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82 | IER_SET = 0x80,
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83 |
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84 | SR_INT = 0x04,
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85 | ALL_INT = 0x7f
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86 | };
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87 |
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88 | /** ACR register fields */
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89 | enum {
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90 | SR_OUT = 0x10
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91 | };
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92 |
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93 | /** Packet types */
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94 | enum {
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95 | PT_ADB = 0x00,
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96 | PT_CUDA = 0x01
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97 | };
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98 |
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99 | /** CUDA packet types */
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100 | enum {
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101 | CPT_AUTOPOLL = 0x01
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102 | };
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103 |
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104 | enum {
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105 | ADB_MAX_ADDR = 16
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106 | };
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107 |
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108 | static irq_cmd_t cuda_cmds[] = {
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109 | {
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110 | .cmd = CMD_PIO_READ_8,
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111 | .addr = NULL, /* will be patched in run-time */
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112 | .dstarg = 1
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113 | },
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114 | {
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115 | .cmd = CMD_BTEST,
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116 | .value = SR_INT,
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117 | .srcarg = 1,
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118 | .dstarg = 2
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119 | },
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120 | {
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121 | .cmd = CMD_PREDICATE,
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122 | .value = 1,
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123 | .srcarg = 2
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124 | },
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125 | {
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126 | .cmd = CMD_ACCEPT
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127 | }
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128 | };
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129 |
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130 |
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131 | static irq_code_t cuda_irq_code = {
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132 | sizeof(cuda_cmds) / sizeof(irq_cmd_t),
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133 | cuda_cmds
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134 | };
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135 |
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136 | static cuda_instance_t cinst;
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137 |
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138 | static cuda_instance_t *instance = &cinst;
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139 | static cuda_t *dev;
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140 |
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141 | static adb_dev_t adb_dev[ADB_MAX_ADDR];
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142 |
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143 | int main(int argc, char *argv[])
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144 | {
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145 | service_id_t service_id;
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146 | int rc;
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147 | int i;
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148 |
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149 | printf(NAME ": VIA-CUDA Apple Desktop Bus driver\n");
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150 |
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151 | for (i = 0; i < ADB_MAX_ADDR; ++i) {
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152 | adb_dev[i].client_sess = NULL;
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153 | adb_dev[i].service_id = 0;
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154 | }
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155 |
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156 | async_set_client_connection(cuda_connection);
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157 | rc = loc_server_register(NAME);
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158 | if (rc < 0) {
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159 | printf(NAME ": Unable to register server.\n");
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160 | return rc;
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161 | }
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162 |
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163 | rc = loc_service_register("adb/kbd", &service_id);
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164 | if (rc != EOK) {
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165 | printf(NAME ": Unable to register service %s.\n", "adb/kdb");
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166 | return rc;
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167 | }
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168 |
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169 | adb_dev[2].service_id = service_id;
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170 | adb_dev[8].service_id = service_id;
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171 |
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172 | rc = loc_service_register("adb/mouse", &service_id);
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173 | if (rc != EOK) {
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174 | printf(NAME ": Unable to register servise %s.\n", "adb/mouse");
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175 | return rc;
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176 | }
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177 |
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178 | adb_dev[9].service_id = service_id;
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179 |
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180 | if (cuda_init() < 0) {
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181 | printf("cuda_init() failed\n");
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182 | return 1;
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183 | }
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184 |
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185 | task_retval(0);
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186 | async_manager();
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187 |
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188 | return 0;
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189 | }
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190 |
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191 | /** Character device connection handler */
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192 | static void cuda_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg)
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193 | {
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194 | ipc_callid_t callid;
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195 | ipc_call_t call;
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196 | sysarg_t method;
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197 | service_id_t dsid;
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198 | int dev_addr, i;
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199 |
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200 | /* Get the device handle. */
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201 | dsid = IPC_GET_ARG1(*icall);
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202 |
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203 | /* Determine which disk device is the client connecting to. */
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204 | dev_addr = -1;
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205 | for (i = 0; i < ADB_MAX_ADDR; i++) {
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206 | if (adb_dev[i].service_id == dsid)
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207 | dev_addr = i;
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208 | }
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209 |
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210 | if (dev_addr < 0) {
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211 | async_answer_0(iid, EINVAL);
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212 | return;
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213 | }
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214 |
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215 | /* Answer the IPC_M_CONNECT_ME_TO call. */
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216 | async_answer_0(iid, EOK);
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217 |
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218 | while (true) {
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219 | callid = async_get_call(&call);
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220 | method = IPC_GET_IMETHOD(call);
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221 |
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222 | if (!method) {
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223 | /* The other side has hung up. */
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224 | async_answer_0(callid, EOK);
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225 | return;
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226 | }
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227 |
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228 | async_sess_t *sess =
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229 | async_callback_receive_start(EXCHANGE_SERIALIZE, &call);
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230 | if (sess != NULL) {
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231 | if (adb_dev[dev_addr].client_sess == NULL) {
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232 | adb_dev[dev_addr].client_sess = sess;
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233 |
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234 | /*
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235 | * A hack so that we send the data to the session
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236 | * regardless of which address the device is on.
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237 | */
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238 | for (i = 0; i < ADB_MAX_ADDR; ++i) {
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239 | if (adb_dev[i].service_id == dsid)
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240 | adb_dev[i].client_sess = sess;
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241 | }
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242 |
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243 | async_answer_0(callid, EOK);
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244 | } else
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245 | async_answer_0(callid, ELIMIT);
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246 | } else
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247 | async_answer_0(callid, EINVAL);
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248 | }
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249 | }
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250 |
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251 |
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252 | static int cuda_init(void)
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253 | {
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254 | if (sysinfo_get_value("cuda.address.physical", &(instance->cuda_physical)) != EOK)
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255 | return -1;
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256 |
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257 | if (sysinfo_get_value("cuda.address.kernel", &(instance->cuda_kernel)) != EOK)
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258 | return -1;
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259 |
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260 | void *vaddr;
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261 | if (pio_enable((void *) instance->cuda_physical, sizeof(cuda_t), &vaddr) != 0)
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262 | return -1;
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263 |
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264 | dev = vaddr;
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265 |
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266 | instance->cuda = dev;
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267 | instance->xstate = cx_listen;
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268 | instance->bidx = 0;
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269 | instance->snd_bytes = 0;
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270 |
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271 | fibril_mutex_initialize(&instance->dev_lock);
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272 |
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273 | /* Disable all interrupts from CUDA. */
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274 | pio_write_8(&dev->ier, IER_CLR | ALL_INT);
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275 |
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276 | cuda_irq_code.cmds[0].addr = (void *) &((cuda_t *) instance->cuda_kernel)->ifr;
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277 | async_set_interrupt_received(cuda_irq_handler);
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278 | irq_register(10, device_assign_devno(), 0, &cuda_irq_code);
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279 |
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280 | /* Enable SR interrupt. */
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281 | pio_write_8(&dev->ier, TIP | TREQ);
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282 | pio_write_8(&dev->ier, IER_SET | SR_INT);
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283 |
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284 | /* Enable ADB autopolling. */
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285 | cuda_autopoll_set(true);
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286 |
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287 | return 0;
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288 | }
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289 |
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290 | static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call)
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291 | {
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292 | uint8_t rbuf[CUDA_RCV_BUF_SIZE];
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293 | size_t len;
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294 | bool handle;
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295 |
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296 | handle = false;
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297 | len = 0;
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298 |
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299 | fibril_mutex_lock(&instance->dev_lock);
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300 |
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301 | /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */
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302 | pio_write_8(&instance->cuda->ifr, SR_INT);
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303 |
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304 | switch (instance->xstate) {
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305 | case cx_listen: cuda_irq_listen(); break;
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306 | case cx_receive: cuda_irq_receive(); break;
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307 | case cx_rcv_end: cuda_irq_rcv_end(rbuf, &len);
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308 | handle = true; break;
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309 | case cx_send_start: cuda_irq_send_start(); break;
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310 | case cx_send: cuda_irq_send(); break;
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311 | }
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312 |
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313 | fibril_mutex_unlock(&instance->dev_lock);
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314 |
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315 | /* Handle an incoming packet. */
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316 | if (handle)
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317 | cuda_packet_handle(rbuf, len);
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318 | }
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319 |
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320 | /** Interrupt in listen state.
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321 | *
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322 | * Start packet reception.
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323 | */
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324 | static void cuda_irq_listen(void)
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325 | {
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326 | uint8_t b;
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327 |
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328 | b = pio_read_8(&dev->b);
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329 |
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330 | if ((b & TREQ) != 0) {
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331 | printf("cuda_irq_listen: no TREQ?!\n");
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332 | return;
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333 | }
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334 |
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335 | pio_read_8(&dev->sr);
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336 | pio_write_8(&dev->b, pio_read_8(&dev->b) & ~TIP);
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337 | instance->xstate = cx_receive;
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338 | }
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339 |
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340 | /** Interrupt in receive state.
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341 | *
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342 | * Receive next byte of packet.
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343 | */
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344 | static void cuda_irq_receive(void)
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345 | {
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346 | uint8_t b, data;
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347 |
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348 | data = pio_read_8(&dev->sr);
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349 | if (instance->bidx < CUDA_RCV_BUF_SIZE)
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350 | instance->rcv_buf[instance->bidx++] = data;
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351 |
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352 | b = pio_read_8(&dev->b);
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353 |
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354 | if ((b & TREQ) == 0) {
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355 | pio_write_8(&dev->b, b ^ TACK);
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356 | } else {
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357 | pio_write_8(&dev->b, b | TACK | TIP);
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358 | instance->xstate = cx_rcv_end;
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359 | }
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360 | }
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361 |
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362 | /** Interrupt in rcv_end state.
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363 | *
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364 | * Terminate packet reception. Either go back to listen state or start
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365 | * receiving another packet if CUDA has one for us.
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366 | */
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367 | static void cuda_irq_rcv_end(void *buf, size_t *len)
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368 | {
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369 | uint8_t b;
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370 |
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371 | b = pio_read_8(&dev->b);
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372 | pio_read_8(&dev->sr);
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373 |
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374 | if ((b & TREQ) == 0) {
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375 | instance->xstate = cx_receive;
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376 | pio_write_8(&dev->b, b & ~TIP);
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377 | } else {
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378 | instance->xstate = cx_listen;
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379 | cuda_send_start();
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380 | }
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381 |
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382 | memcpy(buf, instance->rcv_buf, instance->bidx);
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383 | *len = instance->bidx;
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384 | instance->bidx = 0;
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385 | }
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386 |
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387 | /** Interrupt in send_start state.
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388 | *
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389 | * Process result of sending first byte (and send second on success).
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390 | */
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391 | static void cuda_irq_send_start(void)
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392 | {
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393 | uint8_t b;
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394 |
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395 | b = pio_read_8(&dev->b);
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396 |
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397 | if ((b & TREQ) == 0) {
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398 | /* Collision */
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399 | pio_write_8(&dev->acr, pio_read_8(&dev->acr) & ~SR_OUT);
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400 | pio_read_8(&dev->sr);
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401 | pio_write_8(&dev->b, pio_read_8(&dev->b) | TIP | TACK);
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402 | instance->xstate = cx_listen;
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403 | return;
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404 | }
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405 |
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406 | pio_write_8(&dev->sr, instance->snd_buf[1]);
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407 | pio_write_8(&dev->b, pio_read_8(&dev->b) ^ TACK);
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408 | instance->bidx = 2;
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409 |
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410 | instance->xstate = cx_send;
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411 | }
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412 |
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413 | /** Interrupt in send state.
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414 | *
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415 | * Send next byte or terminate transmission.
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416 | */
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417 | static void cuda_irq_send(void)
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418 | {
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419 | if (instance->bidx < instance->snd_bytes) {
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420 | /* Send next byte. */
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421 | pio_write_8(&dev->sr, instance->snd_buf[instance->bidx++]);
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422 | pio_write_8(&dev->b, pio_read_8(&dev->b) ^ TACK);
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423 | return;
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424 | }
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425 |
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426 | /* End transfer. */
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427 | instance->snd_bytes = 0;
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428 | instance->bidx = 0;
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429 |
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430 | pio_write_8(&dev->acr, pio_read_8(&dev->acr) & ~SR_OUT);
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431 | pio_read_8(&dev->sr);
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432 | pio_write_8(&dev->b, pio_read_8(&dev->b) | TACK | TIP);
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433 |
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434 | instance->xstate = cx_listen;
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435 | /* TODO: Match reply with request. */
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436 | }
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437 |
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438 | static void cuda_packet_handle(uint8_t *data, size_t len)
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439 | {
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440 | if (data[0] != PT_ADB)
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441 | return;
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442 | if (len < 2)
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443 | return;
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444 |
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445 | adb_packet_handle(data + 2, len - 2, (data[1] & 0x40) != 0);
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446 | }
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447 |
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448 | static void adb_packet_handle(uint8_t *data, size_t size, bool autopoll)
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449 | {
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450 | uint8_t dev_addr;
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451 | uint8_t reg_no;
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452 | uint16_t reg_val;
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453 | unsigned i;
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454 |
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455 | dev_addr = data[0] >> 4;
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456 | reg_no = data[0] & 0x03;
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457 |
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458 | if (size != 3) {
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459 | printf("unrecognized packet, size=%d\n", size);
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460 | for (i = 0; i < size; ++i) {
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461 | printf(" 0x%02x", data[i]);
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462 | }
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463 | putchar('\n');
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464 | return;
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465 | }
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466 |
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467 | if (reg_no != 0) {
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468 | printf("unrecognized packet, size=%d\n", size);
|
---|
469 | for (i = 0; i < size; ++i) {
|
---|
470 | printf(" 0x%02x", data[i]);
|
---|
471 | }
|
---|
472 | putchar('\n');
|
---|
473 | return;
|
---|
474 | }
|
---|
475 |
|
---|
476 | reg_val = ((uint16_t) data[1] << 8) | (uint16_t) data[2];
|
---|
477 |
|
---|
478 | if (adb_dev[dev_addr].client_sess == NULL)
|
---|
479 | return;
|
---|
480 |
|
---|
481 | async_exch_t *exch =
|
---|
482 | async_exchange_begin(adb_dev[dev_addr].client_sess);
|
---|
483 | async_msg_1(exch, ADB_REG_NOTIF, reg_val);
|
---|
484 | async_exchange_end(exch);
|
---|
485 | }
|
---|
486 |
|
---|
487 | static void cuda_autopoll_set(bool enable)
|
---|
488 | {
|
---|
489 | instance->snd_buf[0] = PT_CUDA;
|
---|
490 | instance->snd_buf[1] = CPT_AUTOPOLL;
|
---|
491 | instance->snd_buf[2] = enable ? 0x01 : 0x00;
|
---|
492 | instance->snd_bytes = 3;
|
---|
493 | instance->bidx = 0;
|
---|
494 |
|
---|
495 | cuda_send_start();
|
---|
496 | }
|
---|
497 |
|
---|
498 | static void cuda_send_start(void)
|
---|
499 | {
|
---|
500 | cuda_t *dev = instance->cuda;
|
---|
501 |
|
---|
502 | assert(instance->xstate == cx_listen);
|
---|
503 |
|
---|
504 | if (instance->snd_bytes == 0)
|
---|
505 | return;
|
---|
506 |
|
---|
507 | /* Check for incoming data. */
|
---|
508 | if ((pio_read_8(&dev->b) & TREQ) == 0)
|
---|
509 | return;
|
---|
510 |
|
---|
511 | pio_write_8(&dev->acr, pio_read_8(&dev->acr) | SR_OUT);
|
---|
512 | pio_write_8(&dev->sr, instance->snd_buf[0]);
|
---|
513 | pio_write_8(&dev->b, pio_read_8(&dev->b) & ~TIP);
|
---|
514 |
|
---|
515 | instance->xstate = cx_send_start;
|
---|
516 | }
|
---|
517 |
|
---|
518 |
|
---|
519 | /** @}
|
---|
520 | */
|
---|