source: mainline/uspace/srv/hw/bus/cuda_adb/cuda_adb.c@ 8d2dd7f2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8d2dd7f2 was 8d2dd7f2, checked in by Jakub Jermar <jakub@…>, 8 years ago

Reduce the number of files that include <sys/types.h>
  • Property mode set to 100644
File size: 11.4 KB
Line 
1/*
2 * Copyright (c) 2010 Jiri Svoboda
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup genarch
30 * @{
31 */
32/** @file VIA-CUDA Apple Desktop Bus driver
33 *
34 * Note: We should really do a full bus scan at the beginning and resolve
35 * address conflicts. Also we should consider the handler ID in r3. Instead
36 * we just assume a keyboard at address 2 or 8 and a mouse at address 9.
37 */
38
39#include <stdio.h>
40#include <stdlib.h>
41#include <stddef.h>
42#include <stdint.h>
43#include <stdbool.h>
44#include <ddi.h>
45#include <libarch/ddi.h>
46#include <loc.h>
47#include <sysinfo.h>
48#include <errno.h>
49#include <ipc/adb.h>
50#include <assert.h>
51#include "cuda_adb.h"
52
53#define NAME "cuda_adb"
54
55static void cuda_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg);
56static int cuda_init(void);
57static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call, void *arg);
58
59static void cuda_irq_listen(void);
60static void cuda_irq_receive(void);
61static void cuda_irq_rcv_end(void *buf, size_t *len);
62static void cuda_irq_send_start(void);
63static void cuda_irq_send(void);
64
65static void cuda_packet_handle(uint8_t *buf, size_t len);
66static void cuda_send_start(void);
67static void cuda_autopoll_set(bool enable);
68
69static void adb_packet_handle(uint8_t *data, size_t size, bool autopoll);
70
71
72/** B register fields */
73enum {
74 TREQ = 0x08,
75 TACK = 0x10,
76 TIP = 0x20
77};
78
79/** IER register fields */
80enum {
81 IER_CLR = 0x00,
82 IER_SET = 0x80,
83
84 SR_INT = 0x04,
85 ALL_INT = 0x7f
86};
87
88/** ACR register fields */
89enum {
90 SR_OUT = 0x10
91};
92
93/** Packet types */
94enum {
95 PT_ADB = 0x00,
96 PT_CUDA = 0x01
97};
98
99/** CUDA packet types */
100enum {
101 CPT_AUTOPOLL = 0x01
102};
103
104enum {
105 ADB_MAX_ADDR = 16
106};
107
108static irq_pio_range_t cuda_ranges[] = {
109 {
110 .base = 0,
111 .size = sizeof(cuda_t)
112 }
113};
114
115static irq_cmd_t cuda_cmds[] = {
116 {
117 .cmd = CMD_PIO_READ_8,
118 .addr = NULL,
119 .dstarg = 1
120 },
121 {
122 .cmd = CMD_AND,
123 .value = SR_INT,
124 .srcarg = 1,
125 .dstarg = 2
126 },
127 {
128 .cmd = CMD_PREDICATE,
129 .value = 1,
130 .srcarg = 2
131 },
132 {
133 .cmd = CMD_ACCEPT
134 }
135};
136
137
138static irq_code_t cuda_irq_code = {
139 sizeof(cuda_ranges) / sizeof(irq_pio_range_t),
140 cuda_ranges,
141 sizeof(cuda_cmds) / sizeof(irq_cmd_t),
142 cuda_cmds
143};
144
145static cuda_instance_t cinst;
146
147static cuda_instance_t *instance = &cinst;
148static cuda_t *dev;
149
150static adb_dev_t adb_dev[ADB_MAX_ADDR];
151
152int main(int argc, char *argv[])
153{
154 service_id_t service_id;
155 int rc;
156 int i;
157
158 printf(NAME ": VIA-CUDA Apple Desktop Bus driver\n");
159
160 for (i = 0; i < ADB_MAX_ADDR; ++i) {
161 adb_dev[i].client_sess = NULL;
162 adb_dev[i].service_id = 0;
163 }
164
165 async_set_fallback_port_handler(cuda_connection, NULL);
166 rc = loc_server_register(NAME);
167 if (rc < 0) {
168 printf(NAME ": Unable to register server.\n");
169 return rc;
170 }
171
172 rc = loc_service_register("adb/kbd", &service_id);
173 if (rc != EOK) {
174 printf(NAME ": Unable to register service %s.\n", "adb/kdb");
175 return rc;
176 }
177
178 adb_dev[2].service_id = service_id;
179 adb_dev[8].service_id = service_id;
180
181 rc = loc_service_register("adb/mouse", &service_id);
182 if (rc != EOK) {
183 printf(NAME ": Unable to register servise %s.\n", "adb/mouse");
184 return rc;
185 }
186
187 adb_dev[9].service_id = service_id;
188
189 if (cuda_init() < 0) {
190 printf("cuda_init() failed\n");
191 return 1;
192 }
193
194 task_retval(0);
195 async_manager();
196
197 return 0;
198}
199
200/** Character device connection handler */
201static void cuda_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg)
202{
203 ipc_callid_t callid;
204 ipc_call_t call;
205 sysarg_t method;
206 service_id_t dsid;
207 int dev_addr, i;
208
209 /* Get the device handle. */
210 dsid = IPC_GET_ARG2(*icall);
211
212 /* Determine which disk device is the client connecting to. */
213 dev_addr = -1;
214 for (i = 0; i < ADB_MAX_ADDR; i++) {
215 if (adb_dev[i].service_id == dsid)
216 dev_addr = i;
217 }
218
219 if (dev_addr < 0) {
220 async_answer_0(iid, EINVAL);
221 return;
222 }
223
224 /* Answer the IPC_M_CONNECT_ME_TO call. */
225 async_answer_0(iid, EOK);
226
227 while (true) {
228 callid = async_get_call(&call);
229 method = IPC_GET_IMETHOD(call);
230
231 if (!method) {
232 /* The other side has hung up. */
233 async_answer_0(callid, EOK);
234 return;
235 }
236
237 async_sess_t *sess =
238 async_callback_receive_start(EXCHANGE_SERIALIZE, &call);
239 if (sess != NULL) {
240 if (adb_dev[dev_addr].client_sess == NULL) {
241 adb_dev[dev_addr].client_sess = sess;
242
243 /*
244 * A hack so that we send the data to the session
245 * regardless of which address the device is on.
246 */
247 for (i = 0; i < ADB_MAX_ADDR; ++i) {
248 if (adb_dev[i].service_id == dsid)
249 adb_dev[i].client_sess = sess;
250 }
251
252 async_answer_0(callid, EOK);
253 } else
254 async_answer_0(callid, ELIMIT);
255 } else
256 async_answer_0(callid, EINVAL);
257 }
258}
259
260
261static int cuda_init(void)
262{
263 if (sysinfo_get_value("cuda.address.physical", &(instance->cuda_physical)) != EOK)
264 return -1;
265
266 void *vaddr;
267 if (pio_enable((void *) instance->cuda_physical, sizeof(cuda_t), &vaddr) != 0)
268 return -1;
269
270 dev = vaddr;
271
272 instance->cuda = dev;
273 instance->xstate = cx_listen;
274 instance->bidx = 0;
275 instance->snd_bytes = 0;
276
277 fibril_mutex_initialize(&instance->dev_lock);
278
279 /* Disable all interrupts from CUDA. */
280 pio_write_8(&dev->ier, IER_CLR | ALL_INT);
281
282 cuda_irq_code.ranges[0].base = (uintptr_t) instance->cuda_physical;
283 cuda_irq_code.cmds[0].addr = (void *) &((cuda_t *) instance->cuda_physical)->ifr;
284 async_irq_subscribe(10, device_assign_devno(), cuda_irq_handler, NULL,
285 &cuda_irq_code);
286
287 /* Enable SR interrupt. */
288 pio_write_8(&dev->ier, TIP | TREQ);
289 pio_write_8(&dev->ier, IER_SET | SR_INT);
290
291 /* Enable ADB autopolling. */
292 cuda_autopoll_set(true);
293
294 return 0;
295}
296
297static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call, void *arg)
298{
299 uint8_t rbuf[CUDA_RCV_BUF_SIZE];
300 size_t len;
301 bool handle;
302
303 handle = false;
304 len = 0;
305
306 fibril_mutex_lock(&instance->dev_lock);
307
308 switch (instance->xstate) {
309 case cx_listen:
310 cuda_irq_listen();
311 break;
312 case cx_receive:
313 cuda_irq_receive();
314 break;
315 case cx_rcv_end:
316 cuda_irq_rcv_end(rbuf, &len);
317 handle = true;
318 break;
319 case cx_send_start:
320 cuda_irq_send_start();
321 break;
322 case cx_send:
323 cuda_irq_send();
324 break;
325 }
326
327 /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */
328 pio_write_8(&instance->cuda->ifr, SR_INT);
329
330 fibril_mutex_unlock(&instance->dev_lock);
331
332 /* Handle an incoming packet. */
333 if (handle)
334 cuda_packet_handle(rbuf, len);
335}
336
337/** Interrupt in listen state.
338 *
339 * Start packet reception.
340 */
341static void cuda_irq_listen(void)
342{
343 uint8_t b = pio_read_8(&dev->b);
344
345 if ((b & TREQ) != 0) {
346 printf("cuda_irq_listen: no TREQ?!\n");
347 return;
348 }
349
350 pio_write_8(&dev->b, b & ~TIP);
351 instance->xstate = cx_receive;
352}
353
354/** Interrupt in receive state.
355 *
356 * Receive next byte of packet.
357 */
358static void cuda_irq_receive(void)
359{
360 uint8_t data = pio_read_8(&dev->sr);
361 if (instance->bidx < CUDA_RCV_BUF_SIZE)
362 instance->rcv_buf[instance->bidx++] = data;
363
364 uint8_t b = pio_read_8(&dev->b);
365
366 if ((b & TREQ) == 0) {
367 pio_write_8(&dev->b, b ^ TACK);
368 } else {
369 pio_write_8(&dev->b, b | TACK | TIP);
370 instance->xstate = cx_rcv_end;
371 }
372}
373
374/** Interrupt in rcv_end state.
375 *
376 * Terminate packet reception. Either go back to listen state or start
377 * receiving another packet if CUDA has one for us.
378 */
379static void cuda_irq_rcv_end(void *buf, size_t *len)
380{
381 uint8_t b = pio_read_8(&dev->b);
382
383 if ((b & TREQ) == 0) {
384 instance->xstate = cx_receive;
385 pio_write_8(&dev->b, b & ~TIP);
386 } else {
387 instance->xstate = cx_listen;
388 cuda_send_start();
389 }
390
391 memcpy(buf, instance->rcv_buf, instance->bidx);
392 *len = instance->bidx;
393 instance->bidx = 0;
394}
395
396/** Interrupt in send_start state.
397 *
398 * Process result of sending first byte (and send second on success).
399 */
400static void cuda_irq_send_start(void)
401{
402 uint8_t b;
403
404 b = pio_read_8(&dev->b);
405
406 if ((b & TREQ) == 0) {
407 /* Collision */
408 pio_write_8(&dev->acr, pio_read_8(&dev->acr) & ~SR_OUT);
409 pio_read_8(&dev->sr);
410 pio_write_8(&dev->b, pio_read_8(&dev->b) | TIP | TACK);
411 instance->xstate = cx_listen;
412 return;
413 }
414
415 pio_write_8(&dev->sr, instance->snd_buf[1]);
416 pio_write_8(&dev->b, pio_read_8(&dev->b) ^ TACK);
417 instance->bidx = 2;
418
419 instance->xstate = cx_send;
420}
421
422/** Interrupt in send state.
423 *
424 * Send next byte or terminate transmission.
425 */
426static void cuda_irq_send(void)
427{
428 if (instance->bidx < instance->snd_bytes) {
429 /* Send next byte. */
430 pio_write_8(&dev->sr, instance->snd_buf[instance->bidx++]);
431 pio_write_8(&dev->b, pio_read_8(&dev->b) ^ TACK);
432 return;
433 }
434
435 /* End transfer. */
436 instance->snd_bytes = 0;
437 instance->bidx = 0;
438
439 pio_write_8(&dev->acr, pio_read_8(&dev->acr) & ~SR_OUT);
440 pio_read_8(&dev->sr);
441 pio_write_8(&dev->b, pio_read_8(&dev->b) | TACK | TIP);
442
443 instance->xstate = cx_listen;
444 /* TODO: Match reply with request. */
445}
446
447static void cuda_packet_handle(uint8_t *data, size_t len)
448{
449 if (data[0] != PT_ADB)
450 return;
451 if (len < 2)
452 return;
453
454 adb_packet_handle(data + 2, len - 2, (data[1] & 0x40) != 0);
455}
456
457static void adb_packet_handle(uint8_t *data, size_t size, bool autopoll)
458{
459 uint8_t dev_addr;
460 uint8_t reg_no;
461 uint16_t reg_val;
462 unsigned i;
463
464 dev_addr = data[0] >> 4;
465 reg_no = data[0] & 0x03;
466
467 if (size != 3) {
468 printf("unrecognized packet, size=%d\n", size);
469 for (i = 0; i < size; ++i) {
470 printf(" 0x%02x", data[i]);
471 }
472 putchar('\n');
473 return;
474 }
475
476 if (reg_no != 0) {
477 printf("unrecognized packet, size=%d\n", size);
478 for (i = 0; i < size; ++i) {
479 printf(" 0x%02x", data[i]);
480 }
481 putchar('\n');
482 return;
483 }
484
485 reg_val = ((uint16_t) data[1] << 8) | (uint16_t) data[2];
486
487 if (adb_dev[dev_addr].client_sess == NULL)
488 return;
489
490 async_exch_t *exch =
491 async_exchange_begin(adb_dev[dev_addr].client_sess);
492 async_msg_1(exch, ADB_REG_NOTIF, reg_val);
493 async_exchange_end(exch);
494}
495
496static void cuda_autopoll_set(bool enable)
497{
498 instance->snd_buf[0] = PT_CUDA;
499 instance->snd_buf[1] = CPT_AUTOPOLL;
500 instance->snd_buf[2] = enable ? 0x01 : 0x00;
501 instance->snd_bytes = 3;
502 instance->bidx = 0;
503
504 cuda_send_start();
505}
506
507static void cuda_send_start(void)
508{
509 cuda_t *dev = instance->cuda;
510
511 assert(instance->xstate == cx_listen);
512
513 if (instance->snd_bytes == 0)
514 return;
515
516 /* Check for incoming data. */
517 if ((pio_read_8(&dev->b) & TREQ) == 0)
518 return;
519
520 pio_write_8(&dev->acr, pio_read_8(&dev->acr) | SR_OUT);
521 pio_write_8(&dev->sr, instance->snd_buf[0]);
522 pio_write_8(&dev->b, pio_read_8(&dev->b) & ~TIP);
523
524 instance->xstate = cx_send_start;
525}
526
527/** @}
528 */
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