source: mainline/uspace/srv/drivers/pciintel/pci.h@ 3a5909f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3a5909f was 3a5909f, checked in by Lenka Trochtova <trochtova.lenka@…>, 15 years ago

pci bus enumeration - bars and ints

  • Property mode set to 100644
File size: 4.1 KB
RevLine 
[8c06905]1/*
2 * Copyright (c) 2010 Lenka Trochtova
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup pciintel
30 * @{
31 */
32/** @file
33 */
34
35#ifndef PCI_H
36#define PCI_H
37
[5e598e0]38
39#include <stdlib.h>
[8c06905]40#include <driver.h>
[5e598e0]41#include <malloc.h>
[8c06905]42
[3a5909f]43#include "pci_regs.h"
44
45#define PCI_MAX_HW_RES 8
46
[8c06905]47typedef struct pci_dev_data {
48 int bus;
49 int dev;
50 int fn;
[5e598e0]51 int vendor_id;
52 int device_id;
53 hw_resource_list_t hw_resources;
[8c06905]54} pci_dev_data_t;
55
[3a5909f]56void create_pci_match_ids(device_t *dev);
57
58uint8_t pci_conf_read_8(device_t *dev, int reg);
59uint16_t pci_conf_read_16(device_t *dev, int reg);
60uint32_t pci_conf_read_32(device_t *dev, int reg);
61void pci_conf_write_8(device_t *dev, int reg, uint8_t val);
62void pci_conf_write_16(device_t *dev, int reg, uint16_t val);
63void pci_conf_write_32(device_t *dev, int reg, uint32_t val);
64
65void pci_add_range(device_t *dev, uint64_t range_addr, size_t range_size, bool io);
66int pci_read_bar(device_t *dev, int addr);
67void pci_read_interrupt(device_t *dev);
68void pci_add_interrupt(device_t *dev, int irq);
69
70void pci_bus_scan(device_t *parent, int bus_num);
71
72
[5e598e0]73static inline pci_dev_data_t *create_pci_dev_data()
74{
75 pci_dev_data_t *res = (pci_dev_data_t *)malloc(sizeof(pci_dev_data_t));
76 if (NULL != res) {
77 memset(res, 0, sizeof(pci_dev_data_t));
78 }
79 return res;
80}
81
82static inline void init_pci_dev_data(pci_dev_data_t *d, int bus, int dev, int fn)
83{
84 d->bus = bus;
85 d->dev = dev;
86 d->fn = fn;
87}
88
89static inline void delete_pci_dev_data(pci_dev_data_t *d)
90{
91 if (NULL != d) {
92 clean_hw_resource_list(&d->hw_resources);
93 free(d);
94 }
95}
96
[89ce401a]97static inline void create_pci_dev_name(device_t *dev)
98{
99 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data;
100 char *name = NULL;
101 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, dev_data->fn);
102 dev->name = name;
103}
104
[3a5909f]105static inline bool pci_alloc_resource_list(device_t *dev)
106{
107 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data;
108 dev_data->hw_resources.resources = (hw_resource_t *)malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t));
109 return dev_data->hw_resources.resources != NULL;
110}
[89ce401a]111
[3a5909f]112static inline bool pci_clean_resource_list(device_t *dev)
113{
114 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data;
115 if (NULL != dev_data->hw_resources.resources) {
116 free(dev_data->hw_resources.resources);
117 dev_data->hw_resources.resources = NULL;
118 }
119}
120
121/** Read the base address registers (BARs) of the device
122 * and adds the addresses to its hw resource list.
123 *
124 * @param dev the pci device.
125 */
126static inline void pci_read_bars(device_t *dev)
127{
128 // position of the BAR in the PCI configuration address space of the device
129 int addr = PCI_BASE_ADDR_0;
130
131 while (addr <= PCI_BASE_ADDR_5) {
132 addr = pci_read_bar(dev, addr);
133 }
134}
135
136static inline size_t pci_bar_mask_to_size(uint32_t mask)
137{
138 return ((mask & 0xfffffff0) ^ 0xffffffff) + 1;
139}
[8c06905]140
141
142#endif
143
144
145/**
146 * @}
147 */
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