source: mainline/uspace/srv/bd/ata_bd/ata_hw.h@ aa893e0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since aa893e0 was bb0eab1, checked in by Jiri Svoboda <jiri@…>, 15 years ago

Use structures and constants instead of magic numbers.
  • Property mode set to 100644
File size: 7.2 KB
RevLine 
[d770deb]1/*
2 * Copyright (c) 2009 Jiri Svoboda
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup bd
30 * @{
31 */
32/** @file ATA hardware protocol (registers, data structures).
33 */
34
35#ifndef __ATA_HW_H__
36#define __ATA_HW_H__
37
38#include <sys/types.h>
39
40enum {
41 CTL_READ_START = 0,
42 CTL_WRITE_START = 1,
43};
44
45enum {
46 STATUS_FAILURE = 0
47};
48
49enum {
50 MAX_DISKS = 2
51};
52
53/** ATA Command Register Block. */
54typedef union {
55 /* Read/Write */
56 struct {
57 uint16_t data_port;
58 uint8_t sector_count;
59 uint8_t sector_number;
60 uint8_t cylinder_low;
61 uint8_t cylinder_high;
62 uint8_t drive_head;
63 uint8_t pad_rw0;
64 };
65
66 /* Read Only */
67 struct {
68 uint8_t pad_ro0;
69 uint8_t error;
70 uint8_t pad_ro1[5];
71 uint8_t status;
72 };
73
74 /* Write Only */
75 struct {
76 uint8_t pad_wo0;
77 uint8_t features;
78 uint8_t pad_wo1[5];
79 uint8_t command;
80 };
81} ata_cmd_t;
82
83typedef union {
84 /* Read */
85 struct {
86 uint8_t pad0[6];
87 uint8_t alt_status;
88 uint8_t drive_address;
89 };
90
91 /* Write */
92 struct {
93 uint8_t pad1[6];
94 uint8_t device_control;
95 uint8_t pad2;
96 };
97} ata_ctl_t;
98
99enum devctl_bits {
100 DCR_SRST = 0x04, /**< Software Reset */
101 DCR_nIEN = 0x02 /**< Interrupt Enable (negated) */
102};
103
104enum status_bits {
105 SR_BSY = 0x80, /**< Busy */
106 SR_DRDY = 0x40, /**< Drive Ready */
107 SR_DWF = 0x20, /**< Drive Write Fault */
108 SR_DSC = 0x10, /**< Drive Seek Complete */
109 SR_DRQ = 0x08, /**< Data Request */
110 SR_CORR = 0x04, /**< Corrected Data */
111 SR_IDX = 0x02, /**< Index */
112 SR_ERR = 0x01 /**< Error */
113};
114
115enum drive_head_bits {
116 DHR_LBA = 0x40, /**< Use LBA addressing mode */
117 DHR_DRV = 0x10 /**< Select device 1 */
118};
119
120enum error_bits {
121 ER_BBK = 0x80, /**< Bad Block Detected */
122 ER_UNC = 0x40, /**< Uncorrectable Data Error */
123 ER_MC = 0x20, /**< Media Changed */
124 ER_IDNF = 0x10, /**< ID Not Found */
125 ER_MCR = 0x08, /**< Media Change Request */
126 ER_ABRT = 0x04, /**< Aborted Command */
127 ER_TK0NF = 0x02, /**< Track 0 Not Found */
128 ER_AMNF = 0x01 /**< Address Mark Not Found */
129};
130
131enum ata_command {
132 CMD_READ_SECTORS = 0x20,
133 CMD_READ_SECTORS_EXT = 0x24,
134 CMD_WRITE_SECTORS = 0x30,
135 CMD_WRITE_SECTORS_EXT = 0x34,
[88743b5]136 CMD_PACKET = 0xA0,
[7a56e33e]137 CMD_IDENTIFY_PKT_DEV = 0xA1,
[d770deb]138 CMD_IDENTIFY_DRIVE = 0xEC
139};
140
[7a56e33e]141/** Data returned from identify device and identify packet device command. */
[d770deb]142typedef struct {
143 uint16_t gen_conf;
144 uint16_t cylinders;
145 uint16_t _res2;
146 uint16_t heads;
147 uint16_t _vs4;
148 uint16_t _vs5;
149 uint16_t sectors;
150 uint16_t _vs7;
151 uint16_t _vs8;
152 uint16_t _vs9;
153
154 uint16_t serial_number[10];
155 uint16_t _vs20;
156 uint16_t _vs21;
157 uint16_t vs_bytes;
158 uint16_t firmware_rev[4];
159 uint16_t model_name[20];
160
161 uint16_t max_rw_multiple;
162 uint16_t _res48;
[7a56e33e]163 uint16_t caps; /* Different meaning for packet device */
[d770deb]164 uint16_t _res50;
165 uint16_t pio_timing;
166 uint16_t dma_timing;
167
168 uint16_t validity;
169 uint16_t cur_cyl;
170 uint16_t cur_heads;
171 uint16_t cur_sectors;
172 uint16_t cur_capacity0;
173 uint16_t cur_capacity1;
174 uint16_t mss;
175 uint16_t total_lba28_0;
176 uint16_t total_lba28_1;
177 uint16_t sw_dma;
178 uint16_t mw_dma;
179 uint16_t pio_modes;
180 uint16_t min_mw_dma_cycle;
181 uint16_t rec_mw_dma_cycle;
182 uint16_t min_raw_pio_cycle;
183 uint16_t min_iordy_pio_cycle;
184
185 uint16_t _res69;
186 uint16_t _res70;
187 uint16_t _res71;
188 uint16_t _res72;
189 uint16_t _res73;
190 uint16_t _res74;
191
192 uint16_t queue_depth;
193 uint16_t _res76[1 + 79 - 76];
194 uint16_t version_maj;
195 uint16_t version_min;
196 uint16_t cmd_set0;
197 uint16_t cmd_set1;
198 uint16_t csf_sup_ext;
199 uint16_t csf_enabled0;
200 uint16_t csf_enabled1;
201 uint16_t csf_default;
202 uint16_t udma;
203
204 uint16_t _res89[1 + 99 - 89];
205
206 /* Total number of blocks in LBA-48 addressing */
207 uint16_t total_lba48_0;
208 uint16_t total_lba48_1;
209 uint16_t total_lba48_2;
210 uint16_t total_lba48_3;
211
212 /* Note: more fields are defined in ATA/ATAPI-7 */
213 uint16_t _res104[1 + 127 - 104];
214 uint16_t _vs128[1 + 159 - 128];
215 uint16_t _res160[1 + 255 - 160];
216} identify_data_t;
217
[7a56e33e]218/** Capability bits for register device. */
219enum ata_regdev_caps {
220 rd_cap_iordy = 0x0800,
221 rd_cap_iordy_cbd = 0x0400,
222 rd_cap_lba = 0x0200,
223 rd_cap_dma = 0x0100
224};
225
226/** Capability bits for packet device. */
227enum ata_pktdev_caps {
228 pd_cap_ildma = 0x8000,
229 pd_cap_cmdqueue = 0x4000,
230 pd_cap_overlap = 0x2000,
231 pd_cap_need_softreset = 0x1000, /* Obsolete (ATAPI-6) */
232 pd_cap_iordy = 0x0800,
233 pd_cap_iordy_dis = 0x0400,
234 pd_cap_lba = 0x0200, /* Must be on */
235 pd_cap_dma = 0x0100
[d770deb]236};
237
238/** Bits of @c identify_data_t.cmd_set1 */
239enum ata_cs1 {
240 cs1_addr48 = 0x0400 /**< 48-bit address feature set */
241};
242
[bb0eab1]243/** ATA packet command codes. */
244enum ata_pkt_command {
245 PCMD_INQUIRY = 0x12,
246 PCMD_READ_12 = 0xa8
247};
248
249/** ATAPI Inquiry command */
250typedef struct {
251 uint8_t opcode; /**< Operation code (PCMD_INQUIRY) */
252 uint8_t _res0;
253 uint8_t _res1;
254 uint8_t _res2;
255 uint8_t alloc_len; /**< Allocation length */
256 uint8_t _res3;
257 uint8_t _res4;
258 uint8_t _res5;
259 uint32_t _res6;
260} __attribute__ ((packed)) ata_pcmd_inquiry_t;
261
262/** ATAPI Read(12) command */
263typedef struct {
264 uint8_t opcode; /**< Operation code (PCMD_READ_12) */
265 uint8_t _res0;
266 uint32_t ba; /**< Starting block address */
267 uint32_t nblocks; /**< Number of blocks to transfer */
268 uint8_t _res1;
269 uint8_t _res2;
270} __attribute__ ((packed)) ata_pcmd_read_12_t;
271
272/** Data returned from Inquiry command (mandatory part) */
273typedef struct {
274 uint8_t pdev_type; /** Reserved, Peripheral device type */
275 uint8_t rmb; /** RMB, Reserved */
276 uint8_t std_version; /** ISO version, ECMA version, ANSI version */
277 uint8_t atapi_ver_rdf; /** ATAPI version, Response data format */
278 uint8_t additional_len; /** Additional length */
279 uint8_t _res0;
280 uint8_t _res1;
281 uint8_t _res2;
282 uint8_t vendor_id[8]; /** Vendor ID */
283 uint8_t product_id[8]; /** Product ID */
284 uint8_t product_rev[4]; /** Product revision level */
285} ata_inquiry_data_t;
286
287/** Extract value of ata_inquiry_data_t.pdev_type */
288#define INQUIRY_PDEV_TYPE(val) ((val) & 0x1f)
289
290/** Values for ata_inquiry_data_t.pdev_type */
291enum ata_pdev_type {
292 PDEV_TYPE_CDROM = 0x05
293};
294
[d770deb]295#endif
296
297/** @}
298 */
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