source: mainline/uspace/lib/virtio/virtio.c@ d80fa05

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d80fa05 was d80fa05, checked in by Jakub Jermar <jakub@…>, 6 years ago

Accept VIRTIO_F_VERSION_1

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File size: 11.4 KB
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[2d4faf7]1/*
2 * Copyright (c) 2018 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file VIRTIO support
30 */
31
32#include "virtio-pci.h"
33
34#include <as.h>
35#include <align.h>
36#include <macros.h>
37
38#include <ddf/log.h>
[05882233]39#include <barrier.h>
[c1ba24a]40
[1e472ee]41/** Allocate DMA buffers
42 *
43 * @param buffers[in] Number of buffers to allocate.
44 * @param size[in] Size of each buffer.
45 * @param write[in] True if the buffers are writable by the driver, false
46 * otherwise.
47 * @param buf[out] Output array holding virtual addresses of the allocated
48 * buffers.
49 * @param buf_p[out] Output array holding physical addresses of the allocated
50 * buffers.
51 *
[d4ceba0]52 * The buffers can be deallocated by virtio_teardown_dma_bufs().
[1e472ee]53 *
54 * @return EOK on success or error code.
55 */
56errno_t virtio_setup_dma_bufs(unsigned int buffers, size_t size,
57 bool write, void *buf[], uintptr_t buf_p[])
58{
59 /*
60 * Allocate all buffers at once in one large chunk.
61 */
62 void *virt = AS_AREA_ANY;
63 uintptr_t phys;
64 errno_t rc = dmamem_map_anonymous(buffers * size, 0,
65 write ? AS_AREA_WRITE : AS_AREA_READ, 0, &phys, &virt);
66 if (rc != EOK)
67 return rc;
68
69 ddf_msg(LVL_NOTE, "DMA buffers: %p-%p", virt, virt + buffers * size);
70
71 /*
72 * Calculate addresses of the individual buffers for easy access.
73 */
74 for (unsigned i = 0; i < buffers; i++) {
75 buf[i] = virt + i * size;
76 buf_p[i] = phys + i * size;
77 }
78
79 return EOK;
80}
81
82/** Deallocate DMA buffers
83 *
84 * @param buf[in] Array holding the virtual addresses of the DMA buffers
[d4ceba0]85 * previously allocated by virtio_setup_dma_bufs().
[1e472ee]86 */
[8d2289c]87void virtio_teardown_dma_bufs(void *buf[])
[1e472ee]88{
89 if (buf[0]) {
90 dmamem_unmap_anonymous(buf[0]);
91 buf[0] = NULL;
92 }
93}
94
[3d135e9]95void virtio_virtq_desc_set(virtio_dev_t *vdev, uint16_t num, uint16_t descno,
[c1ba24a]96 uint64_t addr, uint32_t len, uint16_t flags, uint16_t next)
97{
98 virtq_desc_t *d = &vdev->queues[num].desc[descno];
[9af56b6]99 pio_write_le64(&d->addr, addr);
100 pio_write_le32(&d->len, len);
101 pio_write_le16(&d->flags, flags);
102 pio_write_le16(&d->next, next);
[c1ba24a]103}
104
[3d135e9]105uint16_t virtio_virtq_desc_get_next(virtio_dev_t *vdev, uint16_t num,
106 uint16_t descno)
107{
108 virtq_desc_t *d = &vdev->queues[num].desc[descno];
109 if (!(pio_read_le16(&d->flags) & VIRTQ_DESC_F_NEXT))
110 return (uint16_t) -1U;
111 return pio_read_le16(&d->next);
112}
113
[331d024]114/** Create free descriptor list from the unused VIRTIO descriptors
115 *
116 * @param vdev[in] VIRTIO device for which the free list will be created.
117 * @param num[in] Index of the virtqueue for which the free list will be
118 * created.
119 * @param size[in] Number of descriptors on the free list. The free list will
120 * contain descriptors starting from 0 to \a size - 1.
121 * @param head[out] Variable that will hold the VIRTIO descriptor at the head
122 * of the free list.
123 */
124void virtio_create_desc_free_list(virtio_dev_t *vdev, uint16_t num,
125 uint16_t size, uint16_t *head)
126{
127 for (unsigned i = 0; i < size; i++) {
128 virtio_virtq_desc_set(vdev, num, i, 0, 0,
[8591b31]129 VIRTQ_DESC_F_NEXT, (i + 1 == size) ? 0xffffu : i + 1);
[331d024]130 }
131 *head = 0;
132}
133
134/** Allocate a descriptor from the free list
135 *
136 * @param vdev[in] VIRTIO device with the free list.
137 * @param num[in] Index of the virtqueue with free list.
138 * @param head[in,out] Head of the free list.
139 *
140 * @return Allocated descriptor or 0xFFFF if the list is empty.
141 */
142uint16_t virtio_alloc_desc(virtio_dev_t *vdev, uint16_t num, uint16_t *head)
143{
144 virtq_t *q = &vdev->queues[num];
145 fibril_mutex_lock(&q->lock);
146 uint16_t descno = *head;
147 if (descno != (uint16_t) -1U)
148 *head = virtio_virtq_desc_get_next(vdev, num, descno);
149 fibril_mutex_unlock(&q->lock);
150 return descno;
151}
152
153/** Free a descriptor into the free list
154 *
155 * @param vdev[in] VIRTIO device with the free list.
156 * @param num[in] Index of the virtqueue with free list.
157 * @param head[in,out] Head of the free list.
158 * @param descno[in] The freed descriptor.
159 */
160void virtio_free_desc(virtio_dev_t *vdev, uint16_t num, uint16_t *head,
161 uint16_t descno)
162{
163 virtq_t *q = &vdev->queues[num];
164 fibril_mutex_lock(&q->lock);
165 virtio_virtq_desc_set(vdev, num, descno, 0, 0, VIRTQ_DESC_F_NEXT,
166 *head);
167 *head = descno;
168 fibril_mutex_unlock(&q->lock);
169}
170
[c1ba24a]171void virtio_virtq_produce_available(virtio_dev_t *vdev, uint16_t num,
172 uint16_t descno)
173{
174 virtq_t *q = &vdev->queues[num];
175
[417aaafb]176 fibril_mutex_lock(&q->lock);
[9af56b6]177 uint16_t idx = pio_read_le16(&q->avail->idx);
[9afd2a8]178 pio_write_le16(&q->avail->ring[idx % q->queue_size], descno);
[c1ba24a]179 write_barrier();
[9afd2a8]180 pio_write_le16(&q->avail->idx, idx + 1);
[c1ba24a]181 write_barrier();
[9af56b6]182 pio_write_le16(q->notify, num);
[417aaafb]183 fibril_mutex_unlock(&q->lock);
[c1ba24a]184}
[2d4faf7]185
[b8ef198b]186bool virtio_virtq_consume_used(virtio_dev_t *vdev, uint16_t num,
187 uint16_t *descno, uint32_t *len)
188{
189 virtq_t *q = &vdev->queues[num];
190
[417aaafb]191 fibril_mutex_lock(&q->lock);
[b8ef198b]192 uint16_t last_idx = q->used_last_idx % q->queue_size;
[417aaafb]193 if (last_idx == (pio_read_le16(&q->used->idx) % q->queue_size)) {
194 fibril_mutex_unlock(&q->lock);
[b8ef198b]195 return false;
[417aaafb]196 }
[b8ef198b]197
198 *descno = (uint16_t) pio_read_le32(&q->used->ring[last_idx].id);
199 *len = pio_read_le32(&q->used->ring[last_idx].len);
200
201 q->used_last_idx++;
[417aaafb]202 fibril_mutex_unlock(&q->lock);
[b8ef198b]203
204 return true;
205}
206
[0180c67]207errno_t virtio_virtq_setup(virtio_dev_t *vdev, uint16_t num, uint16_t size)
[2d4faf7]208{
209 virtq_t *q = &vdev->queues[num];
210 virtio_pci_common_cfg_t *cfg = vdev->common_cfg;
211
212 /* Program the queue of our interest */
[9af56b6]213 pio_write_le16(&cfg->queue_select, num);
[2d4faf7]214
215 /* Trim the size of the queue as needed */
[ee0c03a]216 if (size > pio_read_16(&cfg->queue_size)) {
217 ddf_msg(LVL_ERROR, "Virtq %u: not enough descriptors", num);
218 return ENOMEM;
219 }
[9af56b6]220 pio_write_le16(&cfg->queue_size, size);
[ee0c03a]221 ddf_msg(LVL_NOTE, "Virtq %u: %u descriptors", num, (unsigned) size);
[2d4faf7]222
223 size_t avail_offset = 0;
224 size_t used_offset = 0;
225
226 /*
227 * Compute the size of the needed DMA memory and also the offsets of
228 * the individual components
229 */
230 size_t mem_size = sizeof(virtq_desc_t[size]);
231 mem_size = ALIGN_UP(mem_size, _Alignof(virtq_avail_t));
232 avail_offset = mem_size;
233 mem_size += sizeof(virtq_avail_t) + sizeof(ioport16_t[size]) +
234 sizeof(ioport16_t);
235 mem_size = ALIGN_UP(mem_size, _Alignof(virtq_used_t));
236 used_offset = mem_size;
237 mem_size += sizeof(virtq_used_t) + sizeof(virtq_used_elem_t[size]) +
238 sizeof(ioport16_t);
239
240 /*
[0180c67]241 * Allocate DMA memory for the virtqueues
[2d4faf7]242 */
243 q->virt = AS_AREA_ANY;
[5b5c286]244 errno_t rc = dmamem_map_anonymous(mem_size, 0,
[2d4faf7]245 AS_AREA_READ | AS_AREA_WRITE, 0, &q->phys, &q->virt);
246 if (rc != EOK) {
247 q->virt = NULL;
248 return rc;
249 }
250
[417aaafb]251 fibril_mutex_initialize(&q->lock);
252
[2d4faf7]253 q->size = mem_size;
254 q->queue_size = size;
255 q->desc = q->virt;
256 q->avail = q->virt + avail_offset;
257 q->used = q->virt + used_offset;
[b8ef198b]258 q->used_last_idx = 0;
[2d4faf7]259
260 memset(q->virt, 0, q->size);
261
262 /*
263 * Write the configured addresses to device's common config
264 */
[9af56b6]265 pio_write_le64(&cfg->queue_desc, q->phys);
266 pio_write_le64(&cfg->queue_avail, q->phys + avail_offset);
267 pio_write_le64(&cfg->queue_used, q->phys + used_offset);
[2d4faf7]268
269 ddf_msg(LVL_NOTE, "DMA memory for virtq %d: virt=%p, phys=%p, size=%zu",
270 num, q->virt, (void *) q->phys, q->size);
271
[eda41a9e]272 /* Determine virtq's notification address */
273 q->notify = vdev->notify_base +
[9af56b6]274 pio_read_le16(&cfg->queue_notif_off) * vdev->notify_off_multiplier;
[eda41a9e]275
276 ddf_msg(LVL_NOTE, "notification register: %p", q->notify);
277
[cede6f8]278 /* Enable the queue */
279 pio_write_le16(&cfg->queue_enable, 1);
280 ddf_msg(LVL_NOTE, "virtq %d set", num);
281
[2d4faf7]282 return rc;
283}
284
285void virtio_virtq_teardown(virtio_dev_t *vdev, uint16_t num)
286{
[cede6f8]287 virtio_pci_common_cfg_t *cfg = vdev->common_cfg;
288
289 /* Disable the queue */
290 pio_write_le16(&cfg->queue_enable, 0);
291
[2d4faf7]292 virtq_t *q = &vdev->queues[num];
293 if (q->size)
294 dmamem_unmap_anonymous(q->virt);
295}
296
297/**
298 * Perform device initialization as described in section 3.1.1 of the
299 * specification, steps 1 - 6.
300 */
301errno_t virtio_device_setup_start(virtio_dev_t *vdev, uint32_t features)
302{
303 virtio_pci_common_cfg_t *cfg = vdev->common_cfg;
304
305 /* 1. Reset the device */
306 uint8_t status = VIRTIO_DEV_STATUS_RESET;
307 pio_write_8(&cfg->device_status, status);
308
309 /* 2. Acknowledge we found the device */
310 status |= VIRTIO_DEV_STATUS_ACKNOWLEDGE;
311 pio_write_8(&cfg->device_status, status);
312
313 /* 3. We know how to drive the device */
314 status |= VIRTIO_DEV_STATUS_DRIVER;
315 pio_write_8(&cfg->device_status, status);
316
317 /* 4. Read the offered feature flags */
[9af56b6]318 pio_write_le32(&cfg->device_feature_select, VIRTIO_FEATURES_0_31);
319 uint32_t device_features = pio_read_le32(&cfg->device_feature);
[2d4faf7]320
[d80fa05]321 uint32_t reserved_features = VIRTIO_F_VERSION_1;
322 pio_write_le32(&cfg->device_feature_select, VIRTIO_FEATURES_32_63);
323 uint32_t device_reserved_features = pio_read_le32(&cfg->device_feature);
324
325 ddf_msg(LVL_NOTE, "offered features %x, reserved features %x",
326 device_features, device_reserved_features);
[2d4faf7]327
[3f1d4d5]328 if (features != (features & device_features))
[2d4faf7]329 return ENOTSUP;
[3f1d4d5]330 features &= device_features;
[2d4faf7]331
[d80fa05]332 if (reserved_features != (reserved_features & device_reserved_features))
333 return ENOTSUP;
334 reserved_features &= device_reserved_features;
335
[2d4faf7]336 /* 4. Write the accepted feature flags */
[9af56b6]337 pio_write_le32(&cfg->driver_feature_select, VIRTIO_FEATURES_0_31);
338 pio_write_le32(&cfg->driver_feature, features);
[d80fa05]339 pio_write_le32(&cfg->driver_feature_select, VIRTIO_FEATURES_32_63);
340 pio_write_le32(&cfg->driver_feature, reserved_features);
[2d4faf7]341
[d80fa05]342 ddf_msg(LVL_NOTE, "accepted features %x, reserved features %x",
343 features, reserved_features);
[2d4faf7]344
345 /* 5. Set FEATURES_OK */
346 status |= VIRTIO_DEV_STATUS_FEATURES_OK;
347 pio_write_8(&cfg->device_status, status);
348
[eda41a9e]349 /* 6. Test if the device supports our feature subset */
[2d4faf7]350 status = pio_read_8(&cfg->device_status);
351 if (!(status & VIRTIO_DEV_STATUS_FEATURES_OK))
352 return ENOTSUP;
353
354 return EOK;
355}
356
357/**
358 * Perform device initialization as described in section 3.1.1 of the
359 * specification, step 8 (go live).
360 */
361void virtio_device_setup_finalize(virtio_dev_t *vdev)
362{
363 virtio_pci_common_cfg_t *cfg = vdev->common_cfg;
364
365 /* 8. Go live */
366 uint8_t status = pio_read_8(&cfg->device_status);
367 pio_write_8(&cfg->device_status, status | VIRTIO_DEV_STATUS_DRIVER_OK);
368}
369
370void virtio_device_setup_fail(virtio_dev_t *vdev)
371{
372 virtio_pci_common_cfg_t *cfg = vdev->common_cfg;
373
374 uint8_t status = pio_read_8(&cfg->device_status);
375 pio_write_8(&cfg->device_status, status | VIRTIO_DEV_STATUS_FAILED);
376}
377
378/** @}
379 */
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