source: mainline/uspace/lib/virtio/virtio-pci.h

Last change on this file was d80fa05, checked in by Jakub Jermar <jakub@…>, 6 years ago

Accept VIRTIO_F_VERSION_1
  • Property mode set to 100644
File size: 6.6 KB
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1/*
2 * Copyright (c) 2018 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file VIRTIO PCI definitions
30 */
31
32#ifndef _VIRTIO_PCI_H_
33#define _VIRTIO_PCI_H_
34
35#include <ddf/driver.h>
36#include <pci_dev_iface.h>
37#include <ddi.h>
38#include <fibril_synch.h>
39
40#define VIRTIO_PCI_CAP_CAP_LEN(c) ((c) + 2)
41#define VIRTIO_PCI_CAP_CFG_TYPE(c) ((c) + 3)
42#define VIRTIO_PCI_CAP_BAR(c) ((c) + 4)
43#define VIRTIO_PCI_CAP_OFFSET(c) ((c) + 8)
44#define VIRTIO_PCI_CAP_LENGTH(c) ((c) + 12)
45#define VIRTIO_PCI_CAP_END(c) ((c) + 16)
46
47#define VIRTIO_PCI_CAP_COMMON_CFG 1
48#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
49#define VIRTIO_PCI_CAP_ISR_CFG 3
50#define VIRTIO_PCI_CAP_DEVICE_CFG 4
51#define VIRTIO_PCI_CAP_PCI_CFG 5
52
53#define VIRTIO_DEV_STATUS_RESET 0
54#define VIRTIO_DEV_STATUS_ACKNOWLEDGE 1
55#define VIRTIO_DEV_STATUS_DRIVER 2
56#define VIRTIO_DEV_STATUS_DRIVER_OK 4
57#define VIRTIO_DEV_STATUS_FEATURES_OK 8
58#define VIRTIO_DEV_STATUS_DEVICE_NEEDS_RESET 64
59#define VIRTIO_DEV_STATUS_FAILED 128
60
61#define VIRTIO_FEATURES_0_31 0
62#define VIRTIO_FEATURES_32_63 1
63
64#define VIRTIO_F_VERSION_1 1
65
66/** Common configuration structure layout according to VIRTIO version 1.0 */
67typedef struct virtio_pci_common_cfg {
68 ioport32_t device_feature_select;
69 const ioport32_t device_feature;
70 ioport32_t driver_feature_select;
71 ioport32_t driver_feature;
72 ioport16_t msix_config;
73 const ioport16_t num_queues;
74 ioport8_t device_status;
75 const ioport8_t config_generation;
76 ioport16_t queue_select;
77 ioport16_t queue_size;
78 ioport16_t queue_msix_vector;
79 ioport16_t queue_enable;
80 const ioport16_t queue_notif_off;
81 ioport64_t queue_desc;
82 ioport64_t queue_avail;
83 ioport64_t queue_used;
84} virtio_pci_common_cfg_t;
85
86/** The buffer continues in the next descriptor */
87#define VIRTQ_DESC_F_NEXT 1
88/** Device write-only buffer */
89#define VIRTQ_DESC_F_WRITE 2
90/** Buffer contains a list of buffer descriptors */
91#define VIRTQ_DESC_F_INDIRECT 4
92
93/** Virtqueue Descriptor structure as per VIRTIO version 1.0 */
94typedef struct virtq_desc {
95 ioport64_t addr; /**< Buffer physical address */
96 ioport32_t len; /**< Buffer length */
97 ioport16_t flags; /**< Buffer flags */
98 ioport16_t next; /**< Continuation descriptor */
99} virtq_desc_t;
100
101#define VIRTQ_AVAIL_F_NO_INTERRUPT 1
102
103/** Virtqueue Available Ring as per VIRTIO version 1.0 */
104typedef struct virtq_avail {
105 ioport16_t flags;
106 ioport16_t idx;
107 ioport16_t ring[];
108 /*
109 * We do not define the optional used_event member here in order to be
110 * able to define ring as a variable-length array.
111 */
112} virtq_avail_t;
113
114typedef struct virtq_used_elem {
115 ioport32_t id;
116 ioport32_t len;
117} virtq_used_elem_t;
118
119#define VIRTQ_USED_F_NO_NOTIFY 1
120
121/** Virtqueue Used Ring as per VIRTIO version 1.0 */
122typedef struct virtq_used {
123 ioport16_t flags;
124 ioport16_t idx;
125 virtq_used_elem_t ring[];
126 /*
127 * We do not define the optional avail_event member here in order to be
128 * able to define ring as a variable-length array.
129 */
130} virtq_used_t;
131
132typedef struct {
133 void *virt;
134 uintptr_t phys;
135 size_t size;
136
137 /** Mutex protecting access to this virtqueue */
138 fibril_mutex_t lock;
139
140 /**
141 * Size of the queue which determines the number of descriptors and
142 * DMA buffers.
143 */
144 size_t queue_size;
145
146 /** Virtual address of queue size virtq descriptors */
147 virtq_desc_t *desc;
148 /** Virtual address of the available ring */
149 virtq_avail_t *avail;
150 /** Virtual address of the used ring */
151 virtq_used_t *used;
152 uint16_t used_last_idx;
153
154 /** Address of the queue's notification register */
155 ioport16_t *notify;
156} virtq_t;
157
158/** VIRTIO-device specific data associated with the NIC framework nic_t */
159typedef struct {
160 struct {
161 bool mapped;
162 uintptr_t phys_base;
163 void *mapped_base;
164 size_t mapped_size;
165 } bar[PCI_BAR_COUNT];
166
167 /** Commong configuration structure */
168 virtio_pci_common_cfg_t *common_cfg;
169
170 /** Notification base address */
171 void *notify_base;
172 /** Notification offset multiplier */
173 uint32_t notify_off_multiplier;
174
175 /** INT#x interrupt ISR register */
176 ioport8_t *isr;
177 uintptr_t isr_phys;
178
179 /** Device-specific configuration */
180 void *device_cfg;
181
182 /** Virtqueues */
183 virtq_t *queues;
184} virtio_dev_t;
185
186extern errno_t virtio_setup_dma_bufs(unsigned int, size_t, bool, void *[],
187 uintptr_t []);
188extern void virtio_teardown_dma_bufs(void *[]);
189
190extern void virtio_virtq_desc_set(virtio_dev_t *vdev, uint16_t, uint16_t,
191 uint64_t, uint32_t, uint16_t, uint16_t);
192extern uint16_t virtio_virtq_desc_get_next(virtio_dev_t *vdev, uint16_t,
193 uint16_t);
194
195extern void virtio_create_desc_free_list(virtio_dev_t *, uint16_t, uint16_t,
196 uint16_t *);
197extern uint16_t virtio_alloc_desc(virtio_dev_t *, uint16_t, uint16_t *);
198extern void virtio_free_desc(virtio_dev_t *, uint16_t, uint16_t *, uint16_t);
199
200extern void virtio_virtq_produce_available(virtio_dev_t *, uint16_t, uint16_t);
201extern bool virtio_virtq_consume_used(virtio_dev_t *, uint16_t, uint16_t *,
202 uint32_t *);
203
204extern errno_t virtio_virtq_setup(virtio_dev_t *, uint16_t, uint16_t);
205extern void virtio_virtq_teardown(virtio_dev_t *, uint16_t);
206
207extern errno_t virtio_device_setup_start(virtio_dev_t *, uint32_t);
208extern void virtio_device_setup_fail(virtio_dev_t *);
209extern void virtio_device_setup_finalize(virtio_dev_t *);
210
211extern errno_t virtio_pci_dev_initialize(ddf_dev_t *, virtio_dev_t *);
212extern errno_t virtio_pci_dev_cleanup(virtio_dev_t *);
213
214#endif
215
216/** @}
217 */
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