| 1 | /*
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| 2 | * Copyright (c) 2018 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @file VIRTIO support
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| 30 | */
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| 31 |
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| 32 | #include "virtio-pci.h"
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| 33 |
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| 34 | #include <ddf/driver.h>
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| 35 | #include <ddf/log.h>
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| 36 | #include <pci_dev_iface.h>
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| 37 |
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| 38 | static bool check_bar(virtio_dev_t *vdev, uint8_t bar, uint32_t offset,
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| 39 | uint32_t length)
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| 40 | {
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| 41 | /* We must ignore the capability if bar is greater than 5 */
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| 42 | if (bar >= PCI_BAR_COUNT)
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| 43 | return false;
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| 44 |
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| 45 | /* This is not a mapped BAR */
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| 46 | if (!vdev->bar[bar].mapped)
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| 47 | return false;
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| 48 |
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| 49 | uintptr_t start = (uintptr_t) vdev->bar[bar].mapped_base;
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| 50 | if (start + offset < start)
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| 51 | return false;
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| 52 | if (start + offset > start + vdev->bar[bar].mapped_size)
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| 53 | return false;
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| 54 | if (start + offset + length < start + offset)
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| 55 | return false;
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| 56 | if (start + offset + length > start + vdev->bar[bar].mapped_size)
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| 57 | return false;
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| 58 |
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| 59 | return true;
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| 60 | }
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| 61 |
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| 62 | static void virtio_pci_common_cfg(virtio_dev_t *vdev, uint8_t bar,
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| 63 | uint32_t offset, uint32_t length)
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| 64 | {
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| 65 | if (vdev->common_cfg)
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| 66 | return;
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| 67 |
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| 68 | if (!check_bar(vdev, bar, offset, length))
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| 69 | return;
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| 70 |
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| 71 | vdev->common_cfg = vdev->bar[bar].mapped_base + offset;
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| 72 |
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| 73 | ddf_msg(LVL_NOTE, "common_cfg=%p", vdev->common_cfg);
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| 74 | }
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| 75 |
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| 76 | static void virtio_pci_notify_cfg(virtio_dev_t *vdev, uint8_t bar,
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| 77 | uint32_t offset, uint32_t length, uint32_t multiplier)
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| 78 | {
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| 79 | if (vdev->notify_base)
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| 80 | return;
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| 81 |
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| 82 | if (!check_bar(vdev, bar, offset, length))
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| 83 | return;
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| 84 |
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| 85 | vdev->notify_base = vdev->bar[bar].mapped_base + offset;
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| 86 | vdev->notify_off_multiplier = multiplier;
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| 87 |
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| 88 | ddf_msg(LVL_NOTE, "notify_base=%p, off_multiplier=%u",
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| 89 | vdev->notify_base, vdev->notify_off_multiplier);
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| 90 | }
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| 91 |
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| 92 | static void virtio_pci_isr_cfg(virtio_dev_t *vdev, uint8_t bar, uint32_t offset,
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| 93 | uint32_t length)
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| 94 | {
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| 95 | if (vdev->isr)
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| 96 | return;
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| 97 |
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| 98 | if (!check_bar(vdev, bar, offset, length))
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| 99 | return;
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| 100 |
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| 101 | vdev->isr = vdev->bar[bar].mapped_base + offset;
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| 102 |
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| 103 | ddf_msg(LVL_NOTE, "isr=%p", vdev->isr);
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| 104 | }
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| 105 |
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| 106 | static void virtio_pci_device_cfg(virtio_dev_t *vdev, uint8_t bar,
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| 107 | uint32_t offset, uint32_t length)
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| 108 | {
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| 109 | if (vdev->device_cfg)
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| 110 | return;
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| 111 |
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| 112 | if (!check_bar(vdev, bar, offset, length))
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| 113 | return;
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| 114 |
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| 115 | vdev->device_cfg = vdev->bar[bar].mapped_base + offset;
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| 116 |
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| 117 | ddf_msg(LVL_NOTE, "device_cfg=%p", vdev->device_cfg);
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| 118 | }
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| 119 |
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| 120 | static errno_t enable_resources(async_sess_t *pci_sess, virtio_dev_t *vdev)
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| 121 | {
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| 122 | pio_window_t pio_window;
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| 123 | errno_t rc = pio_window_get(pci_sess, &pio_window);
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| 124 | if (rc != EOK)
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| 125 | return rc;
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| 126 |
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| 127 | hw_resource_list_t hw_res;
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| 128 | rc = hw_res_get_resource_list(pci_sess, &hw_res);
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| 129 | if (rc != EOK)
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| 130 | return rc;
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| 131 |
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| 132 | /*
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| 133 | * Enable resources and reconstruct the mapping between BAR and resource
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| 134 | * indices. We are going to need this later when the VIRTIO PCI
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| 135 | * capabilities refer to specific BARs.
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| 136 | *
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| 137 | * XXX: The mapping should probably be provided by the PCI driver
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| 138 | * itself.
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| 139 | */
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| 140 | for (unsigned i = 0, j = 0; i < PCI_BAR_COUNT && j < hw_res.count;
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| 141 | i++) {
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| 142 | /* Detect and skip unused BARs */
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| 143 | uint32_t bar;
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| 144 | rc = pci_config_space_read_32(pci_sess,
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| 145 | PCI_BAR0 + i * sizeof(uint32_t), &bar);
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| 146 | if (rc != EOK)
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| 147 | return rc;
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| 148 | if (!bar)
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| 149 | continue;
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| 150 |
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| 151 | hw_resource_t *res = &hw_res.resources[j];
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| 152 | rc = pio_enable_resource(&pio_window, res,
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| 153 | &vdev->bar[i].mapped_base, &vdev->bar[i].mapped_size);
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| 154 | if (rc == EOK)
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| 155 | vdev->bar[i].mapped = true;
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| 156 | j++;
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| 157 | }
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| 158 |
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| 159 | return rc;
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| 160 | }
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| 161 |
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| 162 | static errno_t disable_resources(virtio_dev_t *vdev)
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| 163 | {
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| 164 | for (unsigned i = 0; i < PCI_BAR_COUNT; i++) {
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| 165 | if (vdev->bar[i].mapped) {
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| 166 | errno_t rc = pio_disable(vdev->bar[i].mapped_base,
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| 167 | vdev->bar[i].mapped_size);
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| 168 | if (rc != EOK)
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| 169 | return rc;
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| 170 | vdev->bar[i].mapped = false;
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| 171 | }
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| 172 | }
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| 173 |
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| 174 | return EOK;
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| 175 | }
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| 176 |
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| 177 | errno_t virtio_pci_dev_initialize(ddf_dev_t *dev, virtio_dev_t *vdev)
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| 178 | {
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| 179 | memset(vdev, 0, sizeof(virtio_dev_t));
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| 180 |
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| 181 | async_sess_t *pci_sess = ddf_dev_parent_sess_get(dev);
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| 182 | if (!pci_sess)
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| 183 | return ENOENT;
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| 184 |
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| 185 | errno_t rc = enable_resources(pci_sess, vdev);
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| 186 | if (rc != EOK)
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| 187 | goto error;
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| 188 |
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| 189 | /*
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| 190 | * Find the VIRTIO PCI Capabilities
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| 191 | */
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| 192 | uint8_t c;
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| 193 | uint8_t cap_vndr;
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| 194 | for (rc = pci_config_space_cap_first(pci_sess, &c, &cap_vndr);
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| 195 | (rc == EOK) && c;
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| 196 | rc = pci_config_space_cap_next(pci_sess, &c, &cap_vndr)) {
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| 197 | if (cap_vndr != PCI_CAP_VENDORSPECID)
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| 198 | continue;
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| 199 |
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| 200 | uint8_t cap_len;
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| 201 | rc = pci_config_space_read_8(pci_sess,
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| 202 | VIRTIO_PCI_CAP_CAP_LEN(c), &cap_len);
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| 203 | if (rc != EOK)
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| 204 | goto error;
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| 205 |
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| 206 | if (cap_len < VIRTIO_PCI_CAP_END(0)) {
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| 207 | rc = EINVAL;
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| 208 | goto error;
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| 209 | }
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| 210 |
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| 211 | uint8_t cfg_type;
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| 212 | rc = pci_config_space_read_8(pci_sess,
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| 213 | VIRTIO_PCI_CAP_CFG_TYPE(c), &cfg_type);
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| 214 | if (rc != EOK)
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| 215 | goto error;
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| 216 |
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| 217 | uint8_t bar;
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| 218 | rc = pci_config_space_read_8(pci_sess, VIRTIO_PCI_CAP_BAR(c),
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| 219 | &bar);
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| 220 | if (rc != EOK)
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| 221 | goto error;
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| 222 |
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| 223 | uint32_t offset;
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| 224 | rc = pci_config_space_read_32(pci_sess,
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| 225 | VIRTIO_PCI_CAP_OFFSET(c), &offset);
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| 226 | if (rc != EOK)
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| 227 | goto error;
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| 228 |
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| 229 | uint32_t length;
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| 230 | rc = pci_config_space_read_32(pci_sess,
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| 231 | VIRTIO_PCI_CAP_LENGTH(c), &length);
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| 232 | if (rc != EOK)
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| 233 | goto error;
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| 234 |
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| 235 | uint32_t multiplier;
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| 236 | switch (cfg_type) {
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| 237 | case VIRTIO_PCI_CAP_COMMON_CFG:
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| 238 | virtio_pci_common_cfg(vdev, bar, offset, length);
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| 239 | break;
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| 240 | case VIRTIO_PCI_CAP_NOTIFY_CFG:
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| 241 | if (cap_len < VIRTIO_PCI_CAP_END(sizeof(uint32_t))) {
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| 242 | rc = EINVAL;
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| 243 | goto error;
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| 244 | }
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| 245 | rc = pci_config_space_read_32(pci_sess,
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| 246 | VIRTIO_PCI_CAP_END(c), &multiplier);
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| 247 | if (rc != EOK)
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| 248 | goto error;
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| 249 | virtio_pci_notify_cfg(vdev, bar, offset, length,
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| 250 | multiplier);
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| 251 | break;
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| 252 | case VIRTIO_PCI_CAP_ISR_CFG:
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| 253 | virtio_pci_isr_cfg(vdev, bar, offset, length);
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| 254 | break;
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| 255 | case VIRTIO_PCI_CAP_DEVICE_CFG:
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| 256 | virtio_pci_device_cfg(vdev, bar, offset, length);
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| 257 | break;
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| 258 | case VIRTIO_PCI_CAP_PCI_CFG:
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| 259 | break;
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| 260 | default:
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| 261 | break;
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| 262 | }
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| 263 | }
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| 264 |
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| 265 | /* Check that the configuration is complete */
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| 266 | if (!vdev->common_cfg || !vdev->notify_base || !vdev->isr ||
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| 267 | !vdev->device_cfg) {
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| 268 | rc = EINVAL;
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| 269 | goto error;
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| 270 | }
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| 271 |
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| 272 | return rc;
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| 273 |
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| 274 | error:
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| 275 | (void) disable_resources(vdev);
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| 276 | return rc;
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| 277 | }
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| 278 |
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| 279 | errno_t virtio_pci_dev_cleanup(virtio_dev_t *vdev)
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| 280 | {
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| 281 | if (vdev->queues) {
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| 282 | for (unsigned i = 0;
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| 283 | i < pio_read_16(&vdev->common_cfg->num_queues); i++)
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| 284 | virtio_virtq_teardown(vdev, i);
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| 285 | free(vdev->queues);
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| 286 | }
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| 287 | return disable_resources(vdev);
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| 288 | }
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| 289 |
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| 290 | /** @}
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| 291 | */
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