source: mainline/uspace/lib/virtio/virtio-pci.c@ 21ff054

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 21ff054 was 21ff054, checked in by Jakub Jermar <jakub@…>, 8 years ago

Make sure the PCI capability is big enough
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2018 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file VIRTIO support
30 */
31
32#include "virtio-pci.h"
33
34#include <ddf/driver.h>
35#include <ddf/log.h>
36#include <pci_dev_iface.h>
37
38static bool check_bar(virtio_dev_t *vdev, uint8_t bar)
39{
40 /* We must ignore the capability if bar is greater than 5 */
41 if (bar >= PCI_BAR_COUNT)
42 return false;
43
44 /* This is not a mapped BAR */
45 if (!vdev->bar[bar].mapped)
46 return false;
47
48 return true;
49}
50
51static void virtio_pci_common_cfg(virtio_dev_t *vdev, uint8_t bar,
52 uint32_t offset, uint32_t length)
53{
54 if (vdev->common_cfg)
55 return;
56
57 if (!check_bar(vdev, bar))
58 return;
59
60 vdev->common_cfg = vdev->bar[bar].mapped_base + offset;
61
62 ddf_msg(LVL_NOTE, "common_cfg=%p", vdev->common_cfg);
63}
64
65static void virtio_pci_notify_cfg(virtio_dev_t *vdev, uint8_t bar,
66 uint32_t offset, uint32_t length, uint32_t multiplier)
67{
68 if (vdev->notify_base)
69 return;
70
71 if (!check_bar(vdev, bar))
72 return;
73
74 vdev->notify_base = vdev->bar[bar].mapped_base + offset;
75 vdev->notify_off_multiplier = multiplier;
76
77 ddf_msg(LVL_NOTE, "notify_base=%p, off_multiplier=%u",
78 vdev->notify_base, vdev->notify_off_multiplier);
79}
80
81static void virtio_pci_isr_cfg(virtio_dev_t *vdev, uint8_t bar, uint32_t offset,
82 uint32_t length)
83{
84 if (vdev->isr)
85 return;
86
87 if (!check_bar(vdev, bar))
88 return;
89
90 vdev->isr = vdev->bar[bar].mapped_base + offset;
91
92 ddf_msg(LVL_NOTE, "isr=%p", vdev->isr);
93}
94
95static void virtio_pci_device_cfg(virtio_dev_t *vdev, uint8_t bar,
96 uint32_t offset, uint32_t length)
97{
98 if (vdev->device_cfg)
99 return;
100
101 if (!check_bar(vdev, bar))
102 return;
103
104 vdev->device_cfg = vdev->bar[bar].mapped_base + offset;
105
106 ddf_msg(LVL_NOTE, "device_cfg=%p", vdev->device_cfg);
107}
108
109static errno_t enable_resources(async_sess_t *pci_sess, virtio_dev_t *vdev)
110{
111 pio_window_t pio_window;
112 errno_t rc = pio_window_get(pci_sess, &pio_window);
113 if (rc != EOK)
114 return rc;
115
116 hw_resource_list_t hw_res;
117 rc = hw_res_get_resource_list(pci_sess, &hw_res);
118 if (rc != EOK)
119 return rc;
120
121 /*
122 * Enable resources and reconstruct the mapping between BAR and resource
123 * indices. We are going to need this later when the VIRTIO PCI
124 * capabilities refer to specific BARs.
125 *
126 * XXX: The mapping should probably be provided by the PCI driver
127 * itself.
128 */
129 for (unsigned i = 0, j = 0; i < PCI_BAR_COUNT && j < hw_res.count;
130 i++) {
131 /* Detect and skip unused BARs */
132 uint32_t bar;
133 rc = pci_config_space_read_32(pci_sess,
134 PCI_BAR0 + i * sizeof(uint32_t), &bar);
135 if (rc != EOK)
136 return rc;
137 if (!bar)
138 continue;
139
140 hw_resource_t *res = &hw_res.resources[j];
141 rc = pio_enable_resource(&pio_window, res,
142 &vdev->bar[i].mapped_base, &vdev->bar[i].mapped_size);
143 if (rc == EOK)
144 vdev->bar[i].mapped = true;
145 j++;
146 }
147
148 return rc;
149}
150
151static errno_t disable_resources(virtio_dev_t *vdev)
152{
153 for (unsigned i = 0; i < PCI_BAR_COUNT; i++) {
154 if (vdev->bar[i].mapped) {
155 errno_t rc = pio_disable(vdev->bar[i].mapped_base,
156 vdev->bar[i].mapped_size);
157 if (rc != EOK)
158 return rc;
159 vdev->bar[i].mapped = false;
160 }
161 }
162
163 return EOK;
164}
165
166errno_t virtio_pci_dev_initialize(ddf_dev_t *dev, virtio_dev_t *vdev)
167{
168 memset(vdev, 0, sizeof(virtio_dev_t));
169
170 async_sess_t *pci_sess = ddf_dev_parent_sess_get(dev);
171 if (!pci_sess)
172 return ENOENT;
173
174 errno_t rc = enable_resources(pci_sess, vdev);
175 if (rc != EOK)
176 goto error;
177
178 /*
179 * Find the VIRTIO PCI Capabilities
180 */
181 uint8_t c;
182 uint8_t cap_vndr;
183 for (rc = pci_config_space_cap_first(pci_sess, &c, &cap_vndr);
184 (rc == EOK) && c;
185 rc = pci_config_space_cap_next(pci_sess, &c, &cap_vndr)) {
186 if (cap_vndr != PCI_CAP_VENDORSPECID)
187 continue;
188
189 uint8_t cap_len;
190 rc = pci_config_space_read_8(pci_sess,
191 VIRTIO_PCI_CAP_CAP_LEN(c), &cap_len);
192 if (rc != EOK)
193 goto error;
194
195 if (cap_len < VIRTIO_PCI_CAP_END(0)) {
196 rc = EINVAL;
197 goto error;
198 }
199
200 uint8_t cfg_type;
201 rc = pci_config_space_read_8(pci_sess,
202 VIRTIO_PCI_CAP_CFG_TYPE(c), &cfg_type);
203 if (rc != EOK)
204 goto error;
205
206 uint8_t bar;
207 rc = pci_config_space_read_8(pci_sess, VIRTIO_PCI_CAP_BAR(c),
208 &bar);
209 if (rc != EOK)
210 goto error;
211
212 uint32_t offset;
213 rc = pci_config_space_read_32(pci_sess,
214 VIRTIO_PCI_CAP_OFFSET(c), &offset);
215 if (rc != EOK)
216 goto error;
217
218 uint32_t length;
219 rc = pci_config_space_read_32(pci_sess,
220 VIRTIO_PCI_CAP_LENGTH(c), &length);
221 if (rc != EOK)
222 goto error;
223
224 uint32_t multiplier;
225 switch (cfg_type) {
226 case VIRTIO_PCI_CAP_COMMON_CFG:
227 virtio_pci_common_cfg(vdev, bar, offset, length);
228 break;
229 case VIRTIO_PCI_CAP_NOTIFY_CFG:
230 if (cap_len < VIRTIO_PCI_CAP_END(sizeof(uint32_t))) {
231 rc = EINVAL;
232 goto error;
233 }
234 rc = pci_config_space_read_32(pci_sess,
235 VIRTIO_PCI_CAP_END(c), &multiplier);
236 if (rc != EOK)
237 goto error;
238 virtio_pci_notify_cfg(vdev, bar, offset, length,
239 multiplier);
240 break;
241 case VIRTIO_PCI_CAP_ISR_CFG:
242 virtio_pci_isr_cfg(vdev, bar, offset, length);
243 break;
244 case VIRTIO_PCI_CAP_DEVICE_CFG:
245 virtio_pci_device_cfg(vdev, bar, offset, length);
246 break;
247 case VIRTIO_PCI_CAP_PCI_CFG:
248 break;
249 default:
250 break;
251 }
252 }
253
254 /* Check that the configuration is complete */
255 if (!vdev->common_cfg || !vdev->notify_base || !vdev->isr ||
256 !vdev->device_cfg) {
257 rc = EINVAL;
258 goto error;
259 }
260
261 return rc;
262
263error:
264 (void) disable_resources(vdev);
265 return rc;
266}
267
268errno_t virtio_pci_dev_cleanup(virtio_dev_t *vdev)
269{
270 return disable_resources(vdev);
271}
272
273/** @}
274 */
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