1 | /*
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2 | * Copyright (c) 2011 Jan Vesely
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3 | * Copyright (c) 2017 Ondrej Hlavaty <aearsis@eideo.cz>
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4 | * All rights reserved.
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5 | *
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6 | * Redistribution and use in source and binary forms, with or without
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7 | * modification, are permitted provided that the following conditions
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8 | * are met:
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9 | *
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10 | * - Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions and the following disclaimer.
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12 | * - Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | * - The name of the author may not be used to endorse or promote products
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16 | * derived from this software without specific prior written permission.
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17 | *
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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28 | */
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29 |
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30 | /** @addtogroup libusbhost
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31 | * @{
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32 | */
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33 | /** @file
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34 | * @brief UHCI host controller driver structure
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35 | */
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36 |
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37 | #include <assert.h>
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38 | #include <atomic.h>
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39 | #include <mem.h>
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40 | #include <stdlib.h>
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41 | #include <str_error.h>
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42 | #include <usb/debug.h>
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43 | #include <usb/descriptor.h>
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44 | #include <usb/host/hcd.h>
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45 |
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46 | #include "usb_transfer_batch.h"
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47 | #include "bus.h"
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48 |
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49 | #include "endpoint.h"
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50 |
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51 | /** Initialize provided endpoint structure.
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52 | */
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53 | void endpoint_init(endpoint_t *ep, device_t *dev, const usb_endpoint_descriptors_t *desc)
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54 | {
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55 | memset(ep, 0, sizeof(endpoint_t));
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56 |
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57 | assert(dev);
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58 | ep->device = dev;
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59 |
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60 | atomic_set(&ep->refcnt, 0);
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61 | link_initialize(&ep->link);
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62 | fibril_mutex_initialize(&ep->guard);
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63 | fibril_condvar_initialize(&ep->avail);
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64 |
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65 | ep->endpoint = USB_ED_GET_EP(desc->endpoint);
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66 | ep->direction = USB_ED_GET_DIR(desc->endpoint);
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67 | ep->transfer_type = USB_ED_GET_TRANSFER_TYPE(desc->endpoint);
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68 | ep->max_packet_size = USB_ED_GET_MPS(desc->endpoint);
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69 | ep->packets_per_uframe = USB_ED_GET_ADD_OPPS(desc->endpoint) + 1;
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70 |
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71 | /** Direction both is our construct never present in descriptors */
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72 | if (ep->transfer_type == USB_TRANSFER_CONTROL)
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73 | ep->direction = USB_DIRECTION_BOTH;
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74 |
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75 | ep->max_transfer_size = ep->max_packet_size * ep->packets_per_uframe;
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76 |
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77 | ep->bandwidth = endpoint_count_bw(ep, ep->max_transfer_size);
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78 | }
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79 |
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80 | static inline const bus_ops_t *get_bus_ops(endpoint_t *ep)
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81 | {
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82 | return ep->device->bus->ops;
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83 | }
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84 |
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85 | void endpoint_add_ref(endpoint_t *ep)
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86 | {
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87 | atomic_inc(&ep->refcnt);
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88 | }
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89 |
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90 | static inline void endpoint_destroy(endpoint_t *ep)
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91 | {
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92 | const bus_ops_t *ops = BUS_OPS_LOOKUP(get_bus_ops(ep), endpoint_destroy);
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93 | if (ops) {
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94 | ops->endpoint_destroy(ep);
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95 | } else {
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96 | assert(ep->active_batch == NULL);
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97 |
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98 | /* Assume mostly the eps will be allocated by malloc. */
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99 | free(ep);
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100 | }
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101 | }
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102 |
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103 | void endpoint_del_ref(endpoint_t *ep)
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104 | {
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105 | if (atomic_predec(&ep->refcnt) == 0) {
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106 | endpoint_destroy(ep);
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107 | }
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108 | }
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109 |
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110 | static void endpoint_toggle_reset(endpoint_t *ep, toggle_reset_mode_t mode);
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111 |
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112 | /** Mark the endpoint as active and block access for further fibrils.
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113 | * @param ep endpoint_t structure.
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114 | */
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115 | void endpoint_activate_locked(endpoint_t *ep, usb_transfer_batch_t *batch)
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116 | {
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117 | assert(ep);
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118 | assert(batch);
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119 | assert(batch->ep == ep);
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120 | assert(fibril_mutex_is_locked(&ep->guard));
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121 |
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122 | while (ep->active_batch != NULL)
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123 | fibril_condvar_wait(&ep->avail, &ep->guard);
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124 | ep->active_batch = batch;
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125 | }
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126 |
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127 | /** Mark the endpoint as inactive and allow access for further fibrils.
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128 | * @param ep endpoint_t structure.
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129 | */
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130 | void endpoint_deactivate_locked(endpoint_t *ep)
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131 | {
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132 | assert(ep);
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133 | assert(fibril_mutex_is_locked(&ep->guard));
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134 |
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135 | if (ep->active_batch && ep->active_batch->error == EOK)
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136 | endpoint_toggle_reset(ep, ep->active_batch->toggle_reset_mode);
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137 |
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138 | ep->active_batch = NULL;
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139 | fibril_condvar_signal(&ep->avail);
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140 | }
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141 |
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142 | /** Abort an active batch on endpoint, if any.
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143 | *
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144 | * @param[in] ep endpoint_t structure.
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145 | */
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146 | void endpoint_abort(endpoint_t *ep)
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147 | {
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148 | assert(ep);
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149 |
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150 | fibril_mutex_lock(&ep->guard);
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151 | usb_transfer_batch_t *batch = ep->active_batch;
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152 | endpoint_deactivate_locked(ep);
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153 | fibril_mutex_unlock(&ep->guard);
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154 |
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155 | if (batch)
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156 | usb_transfer_batch_abort(batch);
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157 | }
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158 |
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159 | static void endpoint_toggle_reset(endpoint_t *ep, toggle_reset_mode_t mode)
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160 | {
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161 | assert(ep);
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162 |
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163 | if (mode == RESET_NONE)
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164 | return;
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165 |
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166 | const bus_ops_t *ops = BUS_OPS_LOOKUP(get_bus_ops(ep), endpoint_toggle_reset);
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167 | if (!ops)
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168 | return;
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169 |
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170 | device_t *dev = ep->device;
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171 |
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172 | if (mode == RESET_ALL) {
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173 | for (usb_endpoint_t i = 0; i < USB_ENDPOINT_MAX; ++i) {
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174 | if (dev->endpoints[i])
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175 | ops->endpoint_toggle_reset(dev->endpoints[i]);
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176 | }
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177 | } else {
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178 | ops->endpoint_toggle_reset(ep);
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179 | }
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180 | }
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181 |
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182 | ssize_t endpoint_count_bw(endpoint_t *ep, size_t packet_size)
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183 | {
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184 | assert(ep);
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185 |
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186 | const bus_ops_t *ops = BUS_OPS_LOOKUP(get_bus_ops(ep), endpoint_count_bw);
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187 | if (!ops)
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188 | return 0;
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189 |
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190 | return ops->endpoint_count_bw(ep, packet_size);
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191 | }
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192 |
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193 | /** Prepare generic usb_transfer_batch and schedule it.
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194 | * @param ep Endpoint for which the batch shall be created.
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195 | * @param target address and endpoint number.
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196 | * @param setup_data Data to use in setup stage (Control communication type)
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197 | * @param in Callback for device to host communication.
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198 | * @param out Callback for host to device communication.
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199 | * @param arg Callback parameter.
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200 | * @param name Communication identifier (for nicer output).
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201 | * @return Error code.
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202 | */
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203 | int endpoint_send_batch(endpoint_t *ep, usb_target_t target,
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204 | usb_direction_t direction, char *data, size_t size, uint64_t setup_data,
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205 | usbhc_iface_transfer_callback_t on_complete, void *arg, const char *name)
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206 | {
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207 | usb_log_debug2("%s %d:%d %zu(%zu).\n",
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208 | name, target.address, target.endpoint, size, ep->max_packet_size);
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209 |
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210 | bus_t *bus = endpoint_get_bus(ep);
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211 | const bus_ops_t *ops = BUS_OPS_LOOKUP(bus->ops, batch_schedule);
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212 | if (!ops) {
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213 | usb_log_error("HCD does not implement scheduler.\n");
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214 | return ENOTSUP;
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215 | }
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216 |
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217 | /* Offline devices don't schedule transfers other than on EP0. */
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218 | if (!ep->device->online && ep->endpoint > 0) {
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219 | return EAGAIN;
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220 | }
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221 |
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222 | const size_t bw = endpoint_count_bw(ep, size);
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223 | /* Check if we have enough bandwidth reserved */
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224 | if (ep->bandwidth < bw) {
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225 | usb_log_error("Endpoint(%d:%d) %s needs %zu bw "
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226 | "but only %zu is reserved.\n",
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227 | ep->device->address, ep->endpoint, name, bw, ep->bandwidth);
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228 | return ENOSPC;
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229 | }
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230 |
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231 | usb_transfer_batch_t *batch = usb_transfer_batch_create(ep);
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232 | if (!batch) {
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233 | usb_log_error("Failed to create transfer batch.\n");
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234 | return ENOMEM;
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235 | }
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236 |
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237 | batch->target = target;
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238 | batch->buffer = data;
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239 | batch->buffer_size = size;
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240 | batch->setup.packed = setup_data;
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241 | batch->dir = direction;
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242 | batch->on_complete = on_complete;
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243 | batch->on_complete_data = arg;
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244 |
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245 | /* Check for commands that reset toggle bit */
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246 | if (ep->transfer_type == USB_TRANSFER_CONTROL)
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247 | batch->toggle_reset_mode
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248 | = hcd_get_request_toggle_reset_mode(&batch->setup.packet);
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249 |
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250 | const int ret = ops->batch_schedule(batch);
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251 | if (ret != EOK) {
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252 | usb_log_warning("Batch %p failed to schedule: %s", batch, str_error(ret));
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253 | usb_transfer_batch_destroy(batch);
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254 | }
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255 |
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256 | return ret;
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257 | }
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258 |
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259 | /**
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260 | * @}
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261 | */
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