source:
mainline/uspace/lib/libc/arch@
4074601
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| amd64 | 3c4762c | 16 years | Start each amd64 fibril with zero RBP to stop tracing stack at the … | ||
| arm32 | 63c4e28 | 16 years | 'swi' instruction should have an immed_24 argument (according to ARM … | ||
| ia32 | 83a0e47 | 16 years | Start each ia32 fibril with zero EBP to stop tracing stack at the … | ||
| ia64 | e15e0e8 | 16 years | Make provisions for different implementations of atomic_t. This breaks … | ||
| mips32 | e15e0e8 | 16 years | Make provisions for different implementations of atomic_t. This breaks … | ||
| mips32eb | 6ab8697 | 16 years | use builtin_va_* for va_* functions and va_list type (this is … | ||
| ppc32 | e15e0e8 | 16 years | Make provisions for different implementations of atomic_t. This breaks … | ||
| sparc64 | 4074601 | 16 years | Clear the %i7 register in the task and thread entry functions to stop … | ||
|
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