source: mainline/uspace/lib/libc/arch/amd64/_link.ld.in@ 177e4ea

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 177e4ea was e622f0a8, checked in by Jakub Jermar <jakub@…>, 16 years ago

Put .tbss section into the .tdata output section.
This solves the .tbss alignment issue seen on amd64.

  • Property mode set to 100644
File size: 554 bytes
RevLine 
[fcd7053]1STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
[1a030b8]2ENTRY(__entry)
3
[d03e156]4PHDRS {
[a3aa1e1]5 text PT_LOAD FLAGS(5);
6 data PT_LOAD FLAGS(6);
[d03e156]7}
8
[1a030b8]9SECTIONS {
[1cc2974]10 . = 0x1000 + SIZEOF_HEADERS;
[a3aa1e1]11
[1cc2974]12 .init : {
[a3aa1e1]13 *(.init);
14 } :text
15 .text : {
[d03e156]16 *(.text);
[a3aa1e1]17 *(.rodata*);
18 } :text
[1cc2974]19
20 . = . + 0x1000;
21
22 .data : {
[a3aa1e1]23 *(.data);
24 } :data
[c4c5de5]25 .tdata : {
26 _tdata_start = .;
27 *(.tdata);
28 _tdata_end = .;
29 _tbss_start = .;
30 *(.tbss);
31 _tbss_end = .;
32 } :data
[e622f0a8]33 _tls_alignment = ALIGNOF(.tdata);
[a3aa1e1]34 .bss : {
35 *(COMMON);
36 *(.bss);
37 } :data
[d03e156]38
[07d960a]39 . = ALIGN(0x1000);
40 _heap = .;
41
[d03e156]42 /DISCARD/ : {
[a3aa1e1]43 *(*);
[d03e156]44 }
45
[1a030b8]46}
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