source: mainline/uspace/lib/drv/generic/remote_pci.c@ d7f7a4a

Last change on this file since d7f7a4a was d7f7a4a, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 4 years ago

Replace some license headers with SPDX identifier

Headers are replaced using tools/transorm-copyright.sh only
when it can be matched verbatim with the license header used
throughout most of the codebase.
  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 * SPDX-FileCopyrightText: 2011 Jan Vesely
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/** @addtogroup libdrv
8 * @{
9 */
10/** @file
11 */
12
13#include <assert.h>
14#include <async.h>
15#include <errno.h>
16#include <macros.h>
17
18#include "pci_dev_iface.h"
19#include "ddf/driver.h"
20
21typedef enum {
22 IPC_M_CONFIG_SPACE_READ_8,
23 IPC_M_CONFIG_SPACE_READ_16,
24 IPC_M_CONFIG_SPACE_READ_32,
25
26 IPC_M_CONFIG_SPACE_WRITE_8,
27 IPC_M_CONFIG_SPACE_WRITE_16,
28 IPC_M_CONFIG_SPACE_WRITE_32
29} pci_dev_iface_funcs_t;
30
31errno_t pci_config_space_read_8(async_sess_t *sess, uint32_t address, uint8_t *val)
32{
33 sysarg_t res = 0;
34
35 async_exch_t *exch = async_exchange_begin(sess);
36 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
37 IPC_M_CONFIG_SPACE_READ_8, address, &res);
38 async_exchange_end(exch);
39
40 *val = (uint8_t) res;
41 return rc;
42}
43
44errno_t pci_config_space_read_16(async_sess_t *sess, uint32_t address,
45 uint16_t *val)
46{
47 sysarg_t res = 0;
48
49 async_exch_t *exch = async_exchange_begin(sess);
50 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
51 IPC_M_CONFIG_SPACE_READ_16, address, &res);
52 async_exchange_end(exch);
53
54 *val = (uint16_t) res;
55 return rc;
56}
57
58errno_t pci_config_space_read_32(async_sess_t *sess, uint32_t address,
59 uint32_t *val)
60{
61 sysarg_t res = 0;
62
63 async_exch_t *exch = async_exchange_begin(sess);
64 errno_t rc = async_req_2_1(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
65 IPC_M_CONFIG_SPACE_READ_32, address, &res);
66 async_exchange_end(exch);
67
68 *val = (uint32_t) res;
69 return rc;
70}
71
72errno_t pci_config_space_write_8(async_sess_t *sess, uint32_t address, uint8_t val)
73{
74 async_exch_t *exch = async_exchange_begin(sess);
75 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
76 IPC_M_CONFIG_SPACE_WRITE_8, address, val);
77 async_exchange_end(exch);
78
79 return rc;
80}
81
82errno_t pci_config_space_write_16(async_sess_t *sess, uint32_t address,
83 uint16_t val)
84{
85 async_exch_t *exch = async_exchange_begin(sess);
86 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
87 IPC_M_CONFIG_SPACE_WRITE_16, address, val);
88 async_exchange_end(exch);
89
90 return rc;
91}
92
93errno_t pci_config_space_write_32(async_sess_t *sess, uint32_t address,
94 uint32_t val)
95{
96 async_exch_t *exch = async_exchange_begin(sess);
97 errno_t rc = async_req_3_0(exch, DEV_IFACE_ID(PCI_DEV_IFACE),
98 IPC_M_CONFIG_SPACE_WRITE_32, address, val);
99 async_exchange_end(exch);
100
101 return rc;
102}
103
104static void remote_config_space_read_8(ddf_fun_t *, void *, ipc_call_t *);
105static void remote_config_space_read_16(ddf_fun_t *, void *, ipc_call_t *);
106static void remote_config_space_read_32(ddf_fun_t *, void *, ipc_call_t *);
107
108static void remote_config_space_write_8(ddf_fun_t *, void *, ipc_call_t *);
109static void remote_config_space_write_16(ddf_fun_t *, void *, ipc_call_t *);
110static void remote_config_space_write_32(ddf_fun_t *, void *, ipc_call_t *);
111
112/** Remote USB interface operations. */
113static const remote_iface_func_ptr_t remote_pci_iface_ops [] = {
114 [IPC_M_CONFIG_SPACE_READ_8] = remote_config_space_read_8,
115 [IPC_M_CONFIG_SPACE_READ_16] = remote_config_space_read_16,
116 [IPC_M_CONFIG_SPACE_READ_32] = remote_config_space_read_32,
117
118 [IPC_M_CONFIG_SPACE_WRITE_8] = remote_config_space_write_8,
119 [IPC_M_CONFIG_SPACE_WRITE_16] = remote_config_space_write_16,
120 [IPC_M_CONFIG_SPACE_WRITE_32] = remote_config_space_write_32
121};
122
123/** Remote USB interface structure.
124 */
125const remote_iface_t remote_pci_iface = {
126 .method_count = ARRAY_SIZE(remote_pci_iface_ops),
127 .methods = remote_pci_iface_ops
128};
129
130void remote_config_space_read_8(ddf_fun_t *fun, void *iface, ipc_call_t *call)
131{
132 assert(iface);
133 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
134 if (pci_iface->config_space_read_8 == NULL) {
135 async_answer_0(call, ENOTSUP);
136 return;
137 }
138 uint32_t address = DEV_IPC_GET_ARG1(*call);
139 uint8_t value;
140 errno_t ret = pci_iface->config_space_read_8(fun, address, &value);
141 if (ret != EOK) {
142 async_answer_0(call, ret);
143 } else {
144 async_answer_1(call, EOK, value);
145 }
146}
147
148void remote_config_space_read_16(ddf_fun_t *fun, void *iface, ipc_call_t *call)
149{
150 assert(iface);
151 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
152 if (pci_iface->config_space_read_16 == NULL) {
153 async_answer_0(call, ENOTSUP);
154 return;
155 }
156 uint32_t address = DEV_IPC_GET_ARG1(*call);
157 uint16_t value;
158 errno_t ret = pci_iface->config_space_read_16(fun, address, &value);
159 if (ret != EOK) {
160 async_answer_0(call, ret);
161 } else {
162 async_answer_1(call, EOK, value);
163 }
164}
165void remote_config_space_read_32(ddf_fun_t *fun, void *iface, ipc_call_t *call)
166{
167 assert(iface);
168 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
169 if (pci_iface->config_space_read_32 == NULL) {
170 async_answer_0(call, ENOTSUP);
171 return;
172 }
173 uint32_t address = DEV_IPC_GET_ARG1(*call);
174 uint32_t value;
175 errno_t ret = pci_iface->config_space_read_32(fun, address, &value);
176 if (ret != EOK) {
177 async_answer_0(call, ret);
178 } else {
179 async_answer_1(call, EOK, value);
180 }
181}
182
183void remote_config_space_write_8(ddf_fun_t *fun, void *iface, ipc_call_t *call)
184{
185 assert(iface);
186 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
187 if (pci_iface->config_space_write_8 == NULL) {
188 async_answer_0(call, ENOTSUP);
189 return;
190 }
191 uint32_t address = DEV_IPC_GET_ARG1(*call);
192 uint8_t value = DEV_IPC_GET_ARG2(*call);
193 errno_t ret = pci_iface->config_space_write_8(fun, address, value);
194 if (ret != EOK) {
195 async_answer_0(call, ret);
196 } else {
197 async_answer_0(call, EOK);
198 }
199}
200
201void remote_config_space_write_16(ddf_fun_t *fun, void *iface, ipc_call_t *call)
202{
203 assert(iface);
204 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
205 if (pci_iface->config_space_write_16 == NULL) {
206 async_answer_0(call, ENOTSUP);
207 return;
208 }
209 uint32_t address = DEV_IPC_GET_ARG1(*call);
210 uint16_t value = DEV_IPC_GET_ARG2(*call);
211 errno_t ret = pci_iface->config_space_write_16(fun, address, value);
212 if (ret != EOK) {
213 async_answer_0(call, ret);
214 } else {
215 async_answer_0(call, EOK);
216 }
217}
218
219void remote_config_space_write_32(ddf_fun_t *fun, void *iface, ipc_call_t *call)
220{
221 assert(iface);
222 pci_dev_iface_t *pci_iface = (pci_dev_iface_t *)iface;
223 if (pci_iface->config_space_write_32 == NULL) {
224 async_answer_0(call, ENOTSUP);
225 return;
226 }
227 uint32_t address = DEV_IPC_GET_ARG1(*call);
228 uint32_t value = DEV_IPC_GET_ARG2(*call);
229 errno_t ret = pci_iface->config_space_write_32(fun, address, value);
230 if (ret != EOK) {
231 async_answer_0(call, ret);
232 } else {
233 async_answer_0(call, EOK);
234 }
235}
236
237/**
238 * @}
239 */
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