[609243f4] | 1 | /*
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| 2 | * Copyright (c) 2011 Radim Vansa
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| 3 | * Copyright (c) 2011 Jiri Michalec
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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[4805495] | 30 | #ifndef _LIBC_NIC_ETH_PHYS_H_
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| 31 | #define _LIBC_NIC_ETH_PHYS_H_
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[609243f4] | 32 |
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[8d2dd7f2] | 33 | #include <stdint.h>
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[609243f4] | 34 |
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[d1582b50] | 35 | /*
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| 36 | * Definitions of possible supported physical layers
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| 37 | */
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[609243f4] | 38 |
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| 39 | /* Ethernet physical layers */
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| 40 | #define ETH_OLD 0
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| 41 | #define ETH_10M 1
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| 42 | #define ETH_100M 2
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| 43 | #define ETH_1000M 3
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| 44 | #define ETH_10G 4
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| 45 | #define ETH_40G_100G 5
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| 46 | /* 6, 7 reserved for future use */
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| 47 | #define ETH_PHYS_LAYERS 8
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| 48 |
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| 49 | /* < 10Mbs ethernets */
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| 50 | #define ETH_EXPERIMENTAL 0x0001
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| 51 | #define ETH_1BASE5 0x0002
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| 52 | /* 10Mbs ethernets */
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| 53 | #define ETH_10BASE5 0x0001
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| 54 | #define ETH_10BASE2 0x0002
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| 55 | #define ETH_10BROAD36 0x0004
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| 56 | #define ETH_STARLAN_10 0x0008
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| 57 | #define ETH_LATTISNET 0x0010
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| 58 | #define ETH_10BASE_T 0x0020
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| 59 | #define ETH_FOIRL 0x0040
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| 60 | #define ETH_10BASE_FL 0x0080
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| 61 | #define ETH_10BASE_FB 0x0100
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| 62 | #define ETH_10BASE_FP 0x0200
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| 63 | /* 100Mbs (fast) ethernets */
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| 64 | #define ETH_100BASE_TX 0x0001
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| 65 | #define ETH_100BASE_T4 0x0002
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| 66 | #define ETH_100BASE_T2 0x0004
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| 67 | #define ETH_100BASE_FX 0x0008
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| 68 | #define ETH_100BASE_SX 0x0010
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| 69 | #define ETH_100BASE_BX10 0x0020
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| 70 | #define ETH_100BASE_LX10 0x0040
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| 71 | #define ETH_100BASE_VG 0x0080
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| 72 | /* 1000Mbs (gigabit) ethernets */
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| 73 | #define ETH_1000BASE_T 0x0001
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| 74 | #define ETH_1000BASE_TX 0x0002
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| 75 | #define ETH_1000BASE_SX 0x0004
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| 76 | #define ETH_1000BASE_LX 0x0008
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| 77 | #define ETH_1000BASE_LH 0x0010
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| 78 | #define ETH_1000BASE_CX 0x0020
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| 79 | #define ETH_1000BASE_BX10 0x0040
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| 80 | #define ETH_1000BASE_LX10 0x0080
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| 81 | #define ETH_1000BASE_PX10_D 0x0100
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| 82 | #define ETH_1000BASE_PX10_U 0x0200
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| 83 | #define ETH_1000BASE_PX20_D 0x0400
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| 84 | #define ETH_1000BASE_PX20_U 0x0800
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| 85 | #define ETH_1000BASE_ZX 0x1000
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| 86 | #define ETH_1000BASE_KX 0x2000
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| 87 | /* 10Gbs ethernets */
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| 88 | #define ETH_10GBASE_SR 0x0001
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| 89 | #define ETH_10GBASE_LX4 0x0002
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| 90 | #define ETH_10GBASE_LR 0x0004
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| 91 | #define ETH_10GBASE_ER 0x0008
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| 92 | #define ETH_10GBASE_SW 0x0010
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| 93 | #define ETH_10GBASE_LW 0x0020
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| 94 | #define ETH_10GBASE_EW 0x0040
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| 95 | #define ETH_10GBASE_CX4 0x0080
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| 96 | #define ETH_10GBASE_T 0x0100
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| 97 | #define ETH_10GBASE_LRM 0x0200
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| 98 | #define ETH_10GBASE_KX4 0x0400
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| 99 | #define ETH_10GBASE_KR 0x0800
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| 100 | /* 40Gbs and 100Gbs ethernets */
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| 101 | #define ETH_40GBASE_SR4 0x0001
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| 102 | #define ETH_40GBASE_LR4 0x0002
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| 103 | #define ETH_40GBASE_CR4 0x0004
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| 104 | #define ETH_40GBASE_KR4 0x0008
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| 105 | #define ETH_100GBASE_SR10 0x0010
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| 106 | #define ETH_100GBASE_LR4 0x0020
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| 107 | #define ETH_100GBASE_ER4 0x0040
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| 108 | #define ETH_100GBASE_CR10 0x0080
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| 109 |
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[d1582b50] | 110 | /*
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| 111 | * Auto-negotiation advertisement options
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| 112 | */
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[609243f4] | 113 |
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| 114 | #define ETH_AUTONEG_10BASE_T_HALF UINT32_C(0x00000001)
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| 115 | #define ETH_AUTONEG_10BASE_T_FULL UINT32_C(0x00000002)
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| 116 | #define ETH_AUTONEG_100BASE_TX_HALF UINT32_C(0x00000004)
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| 117 | #define ETH_AUTONEG_100BASE_T4_HALF UINT32_C(0x00000008)
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| 118 | #define ETH_AUTONEG_100BASE_T2_HALF UINT32_C(0x00000010)
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| 119 | #define ETH_AUTONEG_100BASE_TX_FULL UINT32_C(0x00000020)
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| 120 | #define ETH_AUTONEG_100BASE_T2_FULL UINT32_C(0x00000040)
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| 121 | #define ETH_AUTONEG_1000BASE_T_HALF UINT32_C(0x00000080)
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| 122 | #define ETH_AUTONEG_1000BASE_T_FULL UINT32_C(0x00000100)
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| 123 |
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| 124 | /** Symetric pause packet (802.3x standard) */
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| 125 | #define ETH_AUTONEG_PAUSE_SYMETRIC UINT32_C(0x10000000)
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| 126 | /** Asymetric pause packet (802.3z standard, gigabit ethernet) */
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| 127 | #define ETH_AUTONEG_PAUSE_ASYMETRIC UINT32_C(0x20000000)
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| 128 |
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| 129 | #define ETH_AUTONEG_MODE_MASK UINT32_C(0x0FFFFFFF)
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| 130 | #define ETH_AUTONEG_FEATURES_MASK UINT32_C(~(ETH_AUTONEG_MODE_MASK))
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| 131 |
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| 132 | #define ETH_AUTONEG_MODES 9
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| 133 |
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| 134 | struct eth_autoneg_map {
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| 135 | uint32_t value;
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| 136 | const char *name;
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| 137 | };
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| 138 |
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| 139 | extern const char *ethernet_names[8][17];
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| 140 | extern const struct eth_autoneg_map ethernet_autoneg_mapping[ETH_AUTONEG_MODES];
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| 141 |
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| 142 | #endif
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