[5cd136ab] | 1 | /*
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| 2 | * Copyright (c) 2010 Lenka Trochtova
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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[79ae36dd] | 28 |
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[54de5ebd] | 29 | /** @addtogroup libc
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[5cd136ab] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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[79ae36dd] | 34 |
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[5cd136ab] | 35 | #ifndef LIBC_DEVICE_HW_RES_H_
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| 36 | #define LIBC_DEVICE_HW_RES_H_
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| 37 |
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| 38 | #include <ipc/dev_iface.h>
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[79ae36dd] | 39 | #include <async.h>
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[3e6a98c5] | 40 | #include <stdbool.h>
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[5cd136ab] | 41 |
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[d9cf684a] | 42 | #define DMA_MODE_ON_DEMAND 0
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| 43 | #define DMA_MODE_WRITE (1 << 2)
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| 44 | #define DMA_MODE_READ (1 << 3)
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| 45 | #define DMA_MODE_AUTO (1 << 4)
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| 46 | #define DMA_MODE_DOWN (1 << 5)
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| 47 | #define DMA_MODE_SINGLE (1 << 6)
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| 48 | #define DMA_MODE_BLOCK (1 << 7)
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| 49 |
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[0adddea] | 50 | /** HW resource provider interface */
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[5dc9622] | 51 | typedef enum {
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[f724e82] | 52 | HW_RES_GET_RESOURCE_LIST = 0,
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[d9cf684a] | 53 | HW_RES_ENABLE_INTERRUPT,
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[d51838f] | 54 | HW_RES_DISABLE_INTERRUPT,
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| 55 | HW_RES_CLEAR_INTERRUPT,
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[d9cf684a] | 56 | HW_RES_DMA_CHANNEL_SETUP,
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[6fd365d] | 57 | HW_RES_DMA_CHANNEL_REMAIN,
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[ce79069b] | 58 | } hw_res_method_t;
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[5dc9622] | 59 |
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[0adddea] | 60 | /** HW resource types */
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[5dc9622] | 61 | typedef enum {
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| 62 | INTERRUPT,
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[79ae36dd] | 63 | IO_RANGE,
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[d9cf684a] | 64 | MEM_RANGE,
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| 65 | DMA_CHANNEL_8,
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| 66 | DMA_CHANNEL_16,
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[5dc9622] | 67 | } hw_res_type_t;
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| 68 |
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| 69 | typedef enum {
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| 70 | LITTLE_ENDIAN = 0,
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| 71 | BIG_ENDIAN
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| 72 | } endianness_t;
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| 73 |
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[0adddea] | 74 | /** HW resource (e.g. interrupt, memory register, i/o register etc.) */
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| 75 | typedef struct {
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[3843ecb] | 76 | hw_res_type_t type;
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| 77 | union {
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| 78 | struct {
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| 79 | uint64_t address;
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[54de5ebd] | 80 | size_t size;
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[9e470c0] | 81 | bool relative;
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| 82 | endianness_t endianness;
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[3843ecb] | 83 | } mem_range;
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[a35b458] | 84 |
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[3843ecb] | 85 | struct {
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| 86 | uint64_t address;
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[54de5ebd] | 87 | size_t size;
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[9e470c0] | 88 | bool relative;
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| 89 | endianness_t endianness;
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[3843ecb] | 90 | } io_range;
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[a35b458] | 91 |
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[3843ecb] | 92 | struct {
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[54de5ebd] | 93 | int irq;
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| 94 | } interrupt;
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[a35b458] | 95 |
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[d9cf684a] | 96 | union {
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| 97 | unsigned int dma8;
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| 98 | unsigned int dma16;
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| 99 | } dma_channel;
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[54de5ebd] | 100 | } res;
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[3843ecb] | 101 | } hw_resource_t;
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| 102 |
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[0adddea] | 103 | typedef struct {
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[3843ecb] | 104 | size_t count;
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[54de5ebd] | 105 | hw_resource_t *resources;
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[3843ecb] | 106 | } hw_resource_list_t;
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| 107 |
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[f724e82] | 108 | static inline void hw_res_clean_resource_list(hw_resource_list_t *hw_res)
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[3843ecb] | 109 | {
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[0adddea] | 110 | if (hw_res->resources != NULL) {
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[3843ecb] | 111 | free(hw_res->resources);
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| 112 | hw_res->resources = NULL;
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| 113 | }
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[a35b458] | 114 |
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[54de5ebd] | 115 | hw_res->count = 0;
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| 116 | }
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[5dc9622] | 117 |
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[b7fd2a0] | 118 | extern errno_t hw_res_get_resource_list(async_sess_t *, hw_resource_list_t *);
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| 119 | extern errno_t hw_res_enable_interrupt(async_sess_t *, int);
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| 120 | extern errno_t hw_res_disable_interrupt(async_sess_t *, int);
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| 121 | extern errno_t hw_res_clear_interrupt(async_sess_t *, int);
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[5cd136ab] | 122 |
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[b7fd2a0] | 123 | extern errno_t hw_res_dma_channel_setup(async_sess_t *, unsigned int, uint32_t,
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[301032a] | 124 | uint32_t, uint8_t);
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[b7fd2a0] | 125 | extern errno_t hw_res_dma_channel_remain(async_sess_t *, unsigned, size_t *);
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[d9cf684a] | 126 |
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[5cd136ab] | 127 | #endif
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| 128 |
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| 129 | /** @}
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[be942bc] | 130 | */
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