[a1e17fc] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[a1e17fc] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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[b2951e2] | 27 | */
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| 28 |
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[a46da63] | 29 | /** @addtogroup libc
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[b2951e2] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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[c0699467] | 33 | */
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[a1e17fc] | 34 |
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[c6ae4c2] | 35 | #include <assert.h>
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[acc0efb] | 36 | #include <atomic.h>
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[c6ae4c2] | 37 | #include <unistd.h>
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[acc0efb] | 38 | #include <stdio.h>
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[c6ae4c2] | 39 | #include <errno.h>
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[c0699467] | 40 | #include <sys/types.h>
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| 41 | #include <abi/ddi/arg.h>
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[a1e17fc] | 42 | #include <ddi.h>
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[1ae8f2b] | 43 | #include <libarch/ddi.h>
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[8049b79] | 44 | #include <device/hw_res.h>
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| 45 | #include <device/hw_res_parsed.h>
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| 46 | #include <device/pio_window.h>
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[a1e17fc] | 47 | #include <libc.h>
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| 48 | #include <task.h>
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[0d5a50c] | 49 | #include <as.h>
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| 50 | #include <align.h>
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| 51 | #include <libarch/config.h>
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[fbcdeb8] | 52 | #include "private/libc.h"
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[a1e17fc] | 53 |
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[acc0efb] | 54 |
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[84afc7b] | 55 | /** Return unique device number.
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| 56 | *
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| 57 | * @return New unique device number.
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| 58 | *
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| 59 | */
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| 60 | int device_assign_devno(void)
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| 61 | {
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| 62 | return __SYSCALL0(SYS_DEVICE_ASSIGN_DEVNO);
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| 63 | }
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| 64 |
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[28f8f170] | 65 | /** Map a piece of physical memory to task.
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[a1e17fc] | 66 | *
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| 67 | * Caller of this function must have the CAP_MEM_MANAGER capability.
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| 68 | *
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[c6ae4c2] | 69 | * @param phys Physical address of the starting frame.
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[28f8f170] | 70 | * @param pages Number of pages to map.
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| 71 | * @param flags Flags for the new address space area.
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[fbcdeb8] | 72 | * @param virt Virtual address of the starting page.
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[28f8f170] | 73 | *
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| 74 | * @return EOK on success
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| 75 | * @return EPERM if the caller lacks the CAP_MEM_MANAGER capability
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| 76 | * @return ENOENT if there is no task with specified ID
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| 77 | * @return ENOMEM if there was some problem in creating
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| 78 | * the address space area.
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[a1e17fc] | 79 | *
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| 80 | */
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[8442d10] | 81 | int physmem_map(uintptr_t phys, size_t pages, unsigned int flags, void **virt)
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[a1e17fc] | 82 | {
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[fbcdeb8] | 83 | return __SYSCALL5(SYS_PHYSMEM_MAP, (sysarg_t) phys,
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| 84 | pages, flags, (sysarg_t) virt, (sysarg_t) __entry);
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[a1e17fc] | 85 | }
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[9426c1a3] | 86 |
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[c6ae4c2] | 87 | int dmamem_map(void *virt, size_t size, unsigned int map_flags,
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[8442d10] | 88 | unsigned int flags, uintptr_t *phys)
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[fd6bd6d] | 89 | {
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[fbcdeb8] | 90 | return (int) __SYSCALL6(SYS_DMAMEM_MAP, (sysarg_t) size,
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| 91 | (sysarg_t) map_flags, (sysarg_t) flags & ~DMAMEM_FLAGS_ANONYMOUS,
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| 92 | (sysarg_t) phys, (sysarg_t) virt, 0);
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[fd6bd6d] | 93 | }
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| 94 |
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[8442d10] | 95 | int dmamem_map_anonymous(size_t size, uintptr_t constraint,
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| 96 | unsigned int map_flags, unsigned int flags, uintptr_t *phys, void **virt)
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[fd6bd6d] | 97 | {
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[8442d10] | 98 | *phys = constraint;
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| 99 |
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[fbcdeb8] | 100 | return (int) __SYSCALL6(SYS_DMAMEM_MAP, (sysarg_t) size,
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| 101 | (sysarg_t) map_flags, (sysarg_t) flags | DMAMEM_FLAGS_ANONYMOUS,
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| 102 | (sysarg_t) phys, (sysarg_t) virt, (sysarg_t) __entry);
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[fd6bd6d] | 103 | }
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| 104 |
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[fbcdeb8] | 105 | int dmamem_unmap(void *virt, size_t size)
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[fd6bd6d] | 106 | {
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[fbcdeb8] | 107 | return __SYSCALL3(SYS_DMAMEM_UNMAP, (sysarg_t) virt, (sysarg_t) size, 0);
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[fd6bd6d] | 108 | }
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| 109 |
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[c6ae4c2] | 110 | int dmamem_unmap_anonymous(void *virt)
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[fd6bd6d] | 111 | {
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[c6ae4c2] | 112 | return __SYSCALL3(SYS_DMAMEM_UNMAP, (sysarg_t) virt, 0,
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| 113 | DMAMEM_FLAGS_ANONYMOUS);
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[fd6bd6d] | 114 | }
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| 115 |
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[9426c1a3] | 116 | /** Enable I/O space range to task.
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| 117 | *
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| 118 | * Caller of this function must have the IO_MEM_MANAGER capability.
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| 119 | *
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[fd6bd6d] | 120 | * @param id Task ID.
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| 121 | * @param ioaddr Starting address of the I/O range.
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| 122 | * @param size Size of the range.
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| 123 | *
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| 124 | * @return EOK on success
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| 125 | * @return EPERM if the caller lacks the CAP_IO_MANAGER capability
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| 126 | * @return ENOENT if there is no task with specified ID
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| 127 | * @return ENOMEM if there was some problem in allocating memory.
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[9426c1a3] | 128 | *
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| 129 | */
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[edb0a33] | 130 | static int iospace_enable(task_id_t id, void *ioaddr, size_t size)
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[9426c1a3] | 131 | {
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[edb0a33] | 132 | const ddi_ioarg_t arg = {
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| 133 | .task_id = id,
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| 134 | .ioaddr = ioaddr,
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| 135 | .size = size
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| 136 | };
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[fd6bd6d] | 137 |
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[5140e3e] | 138 | return __SYSCALL1(SYS_IOSPACE_ENABLE, (sysarg_t) &arg);
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[9426c1a3] | 139 | }
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[3d77747] | 140 |
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[8049b79] | 141 | /** Enable PIO for specified address range.
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| 142 | *
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| 143 | * @param range I/O range to be enable.
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| 144 | * @param virt Virtual address for application's PIO operations.
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| 145 | */
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| 146 | int pio_enable_range(addr_range_t *range, void **virt)
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| 147 | {
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| 148 | return pio_enable(RNGABSPTR(*range), RNGSZ(*range), virt);
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| 149 | }
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| 150 |
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| 151 | /** Enable PIO for specified HW resource wrt. to the PIO window.
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[eeb5cc2] | 152 | *
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| 153 | * @param win PIO window. May be NULL if the resources are known to be
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| 154 | * absolute.
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| 155 | * @param res Resources specifying the I/O range wrt. to the PIO window.
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| 156 | * @param virt Virtual address for application's PIO operations.
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| 157 | *
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| 158 | * @return EOK on success.
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| 159 | * @return Negative error code on failure.
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| 160 | *
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| 161 | */
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| 162 | int pio_enable_resource(pio_window_t *win, hw_resource_t *res, void **virt)
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| 163 | {
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| 164 | uintptr_t addr;
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| 165 | size_t size;
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| 166 |
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| 167 | switch (res->type) {
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| 168 | case IO_RANGE:
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| 169 | addr = res->res.io_range.address;
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| 170 | if (res->res.io_range.relative) {
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| 171 | if (!win)
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| 172 | return EINVAL;
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| 173 | addr += win->io.base;
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| 174 | }
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| 175 | size = res->res.io_range.size;
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| 176 | break;
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| 177 | case MEM_RANGE:
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| 178 | addr = res->res.mem_range.address;
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| 179 | if (res->res.mem_range.relative) {
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| 180 | if (!win)
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| 181 | return EINVAL;
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| 182 | addr += win->mem.base;
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| 183 | }
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| 184 | size = res->res.mem_range.size;
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| 185 | break;
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| 186 | default:
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| 187 | return EINVAL;
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| 188 | }
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| 189 |
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| 190 | return pio_enable((void *) addr, size, virt);
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| 191 | }
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| 192 |
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[0d5a50c] | 193 | /** Enable PIO for specified I/O range.
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| 194 | *
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[fd6bd6d] | 195 | * @param pio_addr I/O start address.
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| 196 | * @param size Size of the I/O region.
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[fbcdeb8] | 197 | * @param virt Virtual address for application's
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[6659037] | 198 | * PIO operations. Can be NULL for PMIO.
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[fd6bd6d] | 199 | *
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[fbcdeb8] | 200 | * @return EOK on success.
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| 201 | * @return Negative error code on failure.
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[0d5a50c] | 202 | *
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| 203 | */
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[fbcdeb8] | 204 | int pio_enable(void *pio_addr, size_t size, void **virt)
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[0d5a50c] | 205 | {
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| 206 | #ifdef IO_SPACE_BOUNDARY
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| 207 | if (pio_addr < IO_SPACE_BOUNDARY) {
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[6659037] | 208 | if (virt)
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| 209 | *virt = pio_addr;
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[0d5a50c] | 210 | return iospace_enable(task_get_id(), pio_addr, size);
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| 211 | }
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[aac1c417] | 212 | #else
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| 213 | (void) iospace_enable;
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[0d5a50c] | 214 | #endif
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[6659037] | 215 | if (!virt)
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| 216 | return EINVAL;
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[8442d10] | 217 |
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| 218 | uintptr_t phys_frame =
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| 219 | ALIGN_DOWN((uintptr_t) pio_addr, PAGE_SIZE);
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| 220 | size_t offset = (uintptr_t) pio_addr - phys_frame;
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[fbcdeb8] | 221 | size_t pages = SIZE2PAGES(offset + size);
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| 222 |
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| 223 | void *virt_page;
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| 224 | int rc = physmem_map(phys_frame, pages,
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| 225 | AS_AREA_READ | AS_AREA_WRITE, &virt_page);
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| 226 | if (rc != EOK)
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| 227 | return rc;
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| 228 |
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| 229 | *virt = virt_page + offset;
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| 230 | return EOK;
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[0d5a50c] | 231 | }
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| 232 |
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[3218648] | 233 | void pio_write_8(ioport8_t *reg, uint8_t val)
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| 234 | {
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[acc0efb] | 235 | pio_trace_log(reg, val, true);
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[3218648] | 236 | arch_pio_write_8(reg, val);
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| 237 | }
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| 238 |
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| 239 | void pio_write_16(ioport16_t *reg, uint16_t val)
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| 240 | {
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[acc0efb] | 241 | pio_trace_log(reg, val, true);
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[3218648] | 242 | arch_pio_write_16(reg, val);
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| 243 | }
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| 244 |
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| 245 | void pio_write_32(ioport32_t *reg, uint32_t val)
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| 246 | {
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[acc0efb] | 247 | pio_trace_log(reg, val, true);
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[3218648] | 248 | arch_pio_write_32(reg, val);
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| 249 | }
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| 250 |
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[b5c2f56] | 251 | uint8_t pio_read_8(const ioport8_t *reg)
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[3218648] | 252 | {
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[acc0efb] | 253 | const uint8_t val = arch_pio_read_8(reg);
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| 254 | pio_trace_log(reg, val, false);
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| 255 | return val;
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[3218648] | 256 | }
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| 257 |
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[b5c2f56] | 258 | uint16_t pio_read_16(const ioport16_t *reg)
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[3218648] | 259 | {
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[acc0efb] | 260 | const uint16_t val = arch_pio_read_16(reg);
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| 261 | pio_trace_log(reg, val, false);
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| 262 | return val;
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[3218648] | 263 | }
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| 264 |
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[b5c2f56] | 265 | uint32_t pio_read_32(const ioport32_t *reg)
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[3218648] | 266 | {
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[acc0efb] | 267 | const uint32_t val = arch_pio_read_32(reg);
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| 268 | pio_trace_log(reg, val, false);
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| 269 | return val;
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[3218648] | 270 | }
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| 271 |
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[64d2b10] | 272 | /** Register IRQ notification.
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| 273 | *
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| 274 | * @param inr IRQ number.
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| 275 | * @param devno Device number of the device generating inr.
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| 276 | * @param method Use this method for notifying me.
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| 277 | * @param ucode Top-half pseudocode handler.
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| 278 | *
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| 279 | * @return Value returned by the kernel.
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| 280 | *
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| 281 | */
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[f044e96] | 282 | int irq_register(int inr, int devno, int method, irq_code_t *ucode)
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[64d2b10] | 283 | {
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[f044e96] | 284 | return __SYSCALL4(SYS_IRQ_REGISTER, inr, devno, method,
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[64d2b10] | 285 | (sysarg_t) ucode);
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| 286 | }
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| 287 |
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| 288 | /** Unregister IRQ notification.
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| 289 | *
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| 290 | * @param inr IRQ number.
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| 291 | * @param devno Device number of the device generating inr.
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| 292 | *
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| 293 | * @return Value returned by the kernel.
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| 294 | *
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| 295 | */
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[f044e96] | 296 | int irq_unregister(int inr, int devno)
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[64d2b10] | 297 | {
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[f044e96] | 298 | return __SYSCALL2(SYS_IRQ_UNREGISTER, inr, devno);
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[64d2b10] | 299 | }
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| 300 |
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[a46da63] | 301 | /** @}
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[b2951e2] | 302 | */
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