source: mainline/uspace/lib/c/arch/sparc32/include/libarch/atomic.h@ b6b02c0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b6b02c0 was b6b02c0, checked in by Jakub Klama <jakub.klama@…>, 12 years ago

Initial work on sparc32 architecture support.

  • /boot/arch/sparc32 loosely based on arm32 port
  • /kernel/arch/sparc32 based on abs32le template
  • /uspace/lib/c/arch/sparc32 based on sparc64 implementation with incompatible parts temporarily commented out.

Work currently done:

  • AMBA plug and play support in loader
  • initial MMU setup
  • kernel booting
  • register window traps
  • context_save_arch/context_restore_arch

Completed milestones: M1, M2

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup libcsparc64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef LIBC_sparc64_ATOMIC_H_
36#define LIBC_sparc64_ATOMIC_H_
37
38#define LIBC_ARCH_ATOMIC_H_
39
40#include <atomicdflt.h>
41#include <sys/types.h>
42
43/** Atomic add operation.
44 *
45 * Use atomic compare and swap operation to atomically add signed value.
46 *
47 * @param val Atomic variable.
48 * @param i Signed value to be added.
49 *
50 * @return Value of the atomic variable as it existed before addition.
51 *
52 */
53static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
54{
55 atomic_count_t a;
56 atomic_count_t b;
57
58 do {
59 volatile uintptr_t ptr = (uintptr_t) &val->count;
60
61 a = *((atomic_count_t *) ptr);
62 b = a + i;
63
64// XXX asm volatile (
65// "cas %0, %2, %1\n"
66// : "+m" (*((atomic_count_t *) ptr)),
67// "+r" (b)
68// : "r" (a)
69// );
70 } while (a != b);
71
72 return a;
73}
74
75static inline atomic_count_t atomic_preinc(atomic_t *val)
76{
77 return atomic_add(val, 1) + 1;
78}
79
80static inline atomic_count_t atomic_postinc(atomic_t *val)
81{
82 return atomic_add(val, 1);
83}
84
85static inline atomic_count_t atomic_predec(atomic_t *val)
86{
87 return atomic_add(val, -1) - 1;
88}
89
90static inline atomic_count_t atomic_postdec(atomic_t *val)
91{
92 return atomic_add(val, -1);
93}
94
95static inline void atomic_inc(atomic_t *val)
96{
97 (void) atomic_add(val, 1);
98}
99
100static inline void atomic_dec(atomic_t *val)
101{
102 (void) atomic_add(val, -1);
103}
104
105#endif
106
107/** @}
108 */
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