source: mainline/uspace/lib/c/arch/ia64/src/fibril.S@ 27f67f5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 27f67f5 was 27f67f5, checked in by Jakub Jermar <jakub@…>, 9 years ago

ia64: use asmtool.h macros for defining symbols
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File size: 8.7 KB
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1#
2# Copyright (c) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <abi/asmtool.h>
30#include <libarch/fibril_context.h>
31
32.text
33
34FUNCTION_BEGIN(context_save)
35 alloc loc0 = ar.pfs, 1, 49, 0, 0
36 mov loc1 = ar.unat ;;
37 mov loc3 = ar.rsc
38
39 .auto
40
41 /*
42 * Flush dirty registers to backing store.
43 * After this ar.bsp and ar.bspstore are equal.
44 */
45 flushrs
46 mov loc4 = ar.bsp
47
48 /*
49 * Put RSE to enforced lazy mode.
50 * So that ar.rnat can be read.
51 */
52 and loc5 = ~3, loc3
53 mov ar.rsc = loc5
54 mov loc5 = ar.rnat
55
56 .explicit
57
58 mov loc6 = ar.lc
59
60 add loc8 = CONTEXT_OFFSET_AR_PFS, in0
61 add loc9 = CONTEXT_OFFSET_AR_UNAT_CALLER, in0
62 add loc10 = CONTEXT_OFFSET_AR_UNAT_CALLEE, in0
63 add loc11 = CONTEXT_OFFSET_AR_RSC, in0
64 add loc12 = CONTEXT_OFFSET_BSP, in0
65 add loc13 = CONTEXT_OFFSET_AR_RNAT, in0
66 add loc14 = CONTEXT_OFFSET_AR_LC, in0
67
68 add loc15 = CONTEXT_OFFSET_R1, in0
69 add loc16 = CONTEXT_OFFSET_R4, in0
70 add loc17 = CONTEXT_OFFSET_R5, in0
71 add loc18 = CONTEXT_OFFSET_R6, in0
72 add loc19 = CONTEXT_OFFSET_R7, in0
73 add loc20 = CONTEXT_OFFSET_SP, in0
74 add loc21 = CONTEXT_OFFSET_TP, in0
75
76 add loc22 = CONTEXT_OFFSET_PC, in0
77 add loc23 = CONTEXT_OFFSET_B1, in0
78 add loc24 = CONTEXT_OFFSET_B2, in0
79 add loc25 = CONTEXT_OFFSET_B3, in0
80 add loc26 = CONTEXT_OFFSET_B4, in0
81 add loc27 = CONTEXT_OFFSET_B5, in0
82
83 add loc28 = CONTEXT_OFFSET_PR, in0
84
85 add loc29 = CONTEXT_OFFSET_F2, in0
86 add loc30 = CONTEXT_OFFSET_F3, in0
87 add loc31 = CONTEXT_OFFSET_F4, in0
88 add loc32 = CONTEXT_OFFSET_F5, in0
89
90 add loc33 = CONTEXT_OFFSET_F16, in0
91 add loc34 = CONTEXT_OFFSET_F17, in0
92 add loc35 = CONTEXT_OFFSET_F18, in0
93 add loc36 = CONTEXT_OFFSET_F19, in0
94 add loc37 = CONTEXT_OFFSET_F20, in0
95 add loc38 = CONTEXT_OFFSET_F21, in0
96 add loc39 = CONTEXT_OFFSET_F22, in0
97 add loc40 = CONTEXT_OFFSET_F23, in0
98 add loc41 = CONTEXT_OFFSET_F24, in0
99 add loc42 = CONTEXT_OFFSET_F25, in0
100 add loc43 = CONTEXT_OFFSET_F26, in0
101 add loc44 = CONTEXT_OFFSET_F27, in0
102 add loc45 = CONTEXT_OFFSET_F28, in0
103 add loc46 = CONTEXT_OFFSET_F29, in0
104 add loc47 = CONTEXT_OFFSET_F30, in0
105 add loc48 = CONTEXT_OFFSET_F31, in0 ;;
106
107 /*
108 * Save general registers including NaT bits
109 */
110 st8.spill [loc15] = r1 ;;
111 st8.spill [loc16] = r4 ;;
112 st8.spill [loc17] = r5 ;;
113 st8.spill [loc18] = r6 ;;
114 st8.spill [loc19] = r7 ;;
115 st8.spill [loc20] = r12 ;; /* save sp */
116 st8.spill [loc21] = r13 ;; /* save tp */
117
118 mov loc2 = ar.unat
119
120 /*
121 * Save application registers
122 */
123 st8 [loc8] = loc0 /* save ar.pfs */
124 st8 [loc9] = loc1 ;; /* save ar.unat (caller) */
125 st8 [loc10] = loc2 /* save ar.unat (callee) */
126 st8 [loc11] = loc3 /* save ar.rsc */
127 st8 [loc12] = loc4 /* save ar.bsp */
128 st8 [loc13] = loc5 /* save ar.rnat */
129 st8 [loc14] = loc6 ;; /* save ar.lc */
130
131 /*
132 * Save branch registers
133 */
134 mov loc2 = b0
135 mov loc3 = b1
136 mov loc4 = b2
137 mov loc5 = b3
138 mov loc6 = b4
139 mov loc7 = b5 ;;
140 st8 [loc22] = loc2 /* save pc */
141 st8 [loc23] = loc3
142 st8 [loc24] = loc4
143 st8 [loc25] = loc5
144 st8 [loc26] = loc6
145 st8 [loc27] = loc7 ;;
146
147 /*
148 * Save predicate registers
149 */
150 mov loc2 = pr ;;
151 st8 [loc28] = loc2
152
153 /*
154 * Save floating-point registers.
155 */
156 stf.spill [loc29] = f2
157 stf.spill [loc30] = f3
158 stf.spill [loc31] = f4
159 stf.spill [loc32] = f5
160
161 stf.spill [loc33] = f16
162 stf.spill [loc34] = f17
163 stf.spill [loc35] = f18
164 stf.spill [loc36] = f19
165 stf.spill [loc37] = f20
166 stf.spill [loc38] = f21
167 stf.spill [loc39] = f22
168 stf.spill [loc40] = f23
169 stf.spill [loc41] = f24
170 stf.spill [loc42] = f25
171 stf.spill [loc43] = f26
172 stf.spill [loc44] = f27
173 stf.spill [loc45] = f28
174 stf.spill [loc46] = f29
175 stf.spill [loc47] = f30
176 stf.spill [loc48] = f31
177
178 mov ar.unat = loc1
179
180 add r8 = r0, r0, 1 /* context_save returns 1 */
181 br.ret.sptk.many b0
182FUNCTION_END(context_save)
183
184FUNCTION_BEGIN(context_restore)
185 alloc loc0 = ar.pfs, 1, 50, 0, 0 ;;
186
187 add loc9 = CONTEXT_OFFSET_AR_PFS, in0
188 add loc10 = CONTEXT_OFFSET_AR_UNAT_CALLER, in0
189 add loc11 = CONTEXT_OFFSET_AR_UNAT_CALLEE, in0
190 add loc12 = CONTEXT_OFFSET_AR_RSC, in0
191 add loc13 = CONTEXT_OFFSET_BSP, in0
192 add loc14 = CONTEXT_OFFSET_AR_RNAT, in0
193 add loc15 = CONTEXT_OFFSET_AR_LC, in0
194
195 add loc16 = CONTEXT_OFFSET_R1, in0
196 add loc17 = CONTEXT_OFFSET_R4, in0
197 add loc18 = CONTEXT_OFFSET_R5, in0
198 add loc19 = CONTEXT_OFFSET_R6, in0
199 add loc20 = CONTEXT_OFFSET_R7, in0
200 add loc21 = CONTEXT_OFFSET_SP, in0
201 add loc22 = CONTEXT_OFFSET_TP, in0
202
203 add loc23 = CONTEXT_OFFSET_PC, in0
204 add loc24 = CONTEXT_OFFSET_B1, in0
205 add loc25 = CONTEXT_OFFSET_B2, in0
206 add loc26 = CONTEXT_OFFSET_B3, in0
207 add loc27 = CONTEXT_OFFSET_B4, in0
208 add loc28 = CONTEXT_OFFSET_B5, in0
209
210 add loc29 = CONTEXT_OFFSET_PR, in0
211
212 add loc30 = CONTEXT_OFFSET_F2, in0
213 add loc31 = CONTEXT_OFFSET_F3, in0
214 add loc32 = CONTEXT_OFFSET_F4, in0
215 add loc33 = CONTEXT_OFFSET_F5, in0
216
217 add loc34 = CONTEXT_OFFSET_F16, in0
218 add loc35 = CONTEXT_OFFSET_F17, in0
219 add loc36 = CONTEXT_OFFSET_F18, in0
220 add loc37 = CONTEXT_OFFSET_F19, in0
221 add loc38 = CONTEXT_OFFSET_F20, in0
222 add loc39 = CONTEXT_OFFSET_F21, in0
223 add loc40 = CONTEXT_OFFSET_F22, in0
224 add loc41 = CONTEXT_OFFSET_F23, in0
225 add loc42 = CONTEXT_OFFSET_F24, in0
226 add loc43 = CONTEXT_OFFSET_F25, in0
227 add loc44 = CONTEXT_OFFSET_F26, in0
228 add loc45 = CONTEXT_OFFSET_F27, in0
229 add loc46 = CONTEXT_OFFSET_F28, in0
230 add loc47 = CONTEXT_OFFSET_F29, in0
231 add loc48 = CONTEXT_OFFSET_F30, in0
232 add loc49 = CONTEXT_OFFSET_F31, in0 ;;
233
234 ld8 loc0 = [loc9] /* load ar.pfs */
235 ld8 loc1 = [loc10] /* load ar.unat (caller) */
236 ld8 loc2 = [loc11] /* load ar.unat (callee) */
237 ld8 loc3 = [loc12] /* load ar.rsc */
238 ld8 loc4 = [loc13] /* load ar.bsp */
239 ld8 loc5 = [loc14] /* load ar.rnat */
240 ld8 loc6 = [loc15] /* load ar.lc */
241
242 .auto
243
244 /*
245 * Invalidate the ALAT
246 */
247 invala
248
249 /*
250 * Put RSE to enforced lazy mode.
251 * So that ar.bspstore and ar.rnat can be written.
252 */
253 movl loc8 = ~3
254 and loc8 = loc3, loc8
255 mov ar.rsc = loc8
256
257 /*
258 * Flush dirty registers to backing store.
259 * We do this because we want the following move
260 * to ar.bspstore to assign the same value to ar.bsp.
261 */
262 flushrs
263
264 /*
265 * Restore application registers
266 */
267 mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */
268 mov ar.rnat = loc5
269 mov ar.pfs = loc0
270 mov ar.rsc = loc3
271
272 .explicit
273
274 mov ar.unat = loc2 ;;
275 mov ar.lc = loc6
276
277 /*
278 * Restore general registers including NaT bits
279 */
280 ld8.fill r1 = [loc16] ;;
281 ld8.fill r4 = [loc17] ;;
282 ld8.fill r5 = [loc18] ;;
283 ld8.fill r6 = [loc19] ;;
284 ld8.fill r7 = [loc20] ;;
285 ld8.fill r12 = [loc21] ;; /* restore sp */
286 ld8.fill r13 = [loc22] ;;
287
288 /*
289 * Restore branch registers
290 */
291 ld8 loc2 = [loc23] /* restore pc */
292 ld8 loc3 = [loc24]
293 ld8 loc4 = [loc25]
294 ld8 loc5 = [loc26]
295 ld8 loc6 = [loc27]
296 ld8 loc7 = [loc28] ;;
297 mov b0 = loc2
298 mov b1 = loc3
299 mov b2 = loc4
300 mov b3 = loc5
301 mov b4 = loc6
302 mov b5 = loc7 ;;
303
304 /*
305 * Restore predicate registers
306 */
307 ld8 loc2 = [loc29] ;;
308 mov pr = loc2, ~0
309
310 /*
311 * Restore floating-point registers.
312 */
313 ldf.fill f2 = [loc30]
314 ldf.fill f3 = [loc31]
315 ldf.fill f4 = [loc32]
316 ldf.fill f5 = [loc33]
317
318 ldf.fill f16 = [loc34]
319 ldf.fill f17 = [loc35]
320 ldf.fill f18 = [loc36]
321 ldf.fill f19 = [loc37]
322 ldf.fill f20 = [loc38]
323 ldf.fill f21 = [loc39]
324 ldf.fill f22 = [loc40]
325 ldf.fill f23 = [loc41]
326 ldf.fill f24 = [loc42]
327 ldf.fill f25 = [loc43]
328 ldf.fill f26 = [loc44]
329 ldf.fill f27 = [loc45]
330 ldf.fill f28 = [loc46]
331 ldf.fill f29 = [loc47]
332 ldf.fill f30 = [loc48]
333 ldf.fill f31 = [loc49]
334
335 mov ar.unat = loc1
336
337 mov r8 = r0 /* context_restore returns 0 */
338 br.ret.sptk.many b0
339FUNCTION_END(context_restore)
340
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