source: mainline/uspace/lib/c/arch/ia64/include/libarch/ddi.h

Last change on this file was 4805495, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 6 years ago

Make sure libc and abi header guards are reserved identifiers

It's only needed for a small subset that end up included from standard
headers, but for consistency this changes all of them.

  • Property mode set to 100644
File size: 4.3 KB
RevLine 
[323a5aaf]1/*
[1ae8f2b]2 * Copyright (c) 2005 Jakub Vana
[323a5aaf]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1b20da0]29/** @addtogroup libcia64
[323a5aaf]30 * @{
31 */
32/** @file
33 */
34
[4805495]35#ifndef _LIBC_ia64_DDI_H_
36#define _LIBC_ia64_DDI_H_
[323a5aaf]37
[7ee7e6a]38#include <ddi.h>
[323a5aaf]39
[36e9cd1]40#define IO_SPACE_BOUNDARY ((void *) (64 * 1024))
[323a5aaf]41
42uint64_t get_ia64_iospace_address(void);
43
44extern uint64_t ia64_iospace_address;
45
[1ae8f2b]46#define IA64_IOSPACE_ADDRESS \
47 (ia64_iospace_address ? \
48 ia64_iospace_address : \
49 (ia64_iospace_address = get_ia64_iospace_address()))
[323a5aaf]50
[3218648]51static inline void arch_pio_write_8(ioport8_t *port, uint8_t v)
[323a5aaf]52{
[86a34d3e]53 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
54 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]55
[86a34d3e]56 *((ioport8_t *)(IA64_IOSPACE_ADDRESS +
57 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
58 } else {
59 *port = v;
60 }
[323a5aaf]61
62 asm volatile ("mf\n" ::: "memory");
[314f3a3c]63 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]64}
65
[3218648]66static inline void arch_pio_write_16(ioport16_t *port, uint16_t v)
[323a5aaf]67{
[86a34d3e]68 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
69 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]70
[86a34d3e]71 *((ioport16_t *)(IA64_IOSPACE_ADDRESS +
72 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
73 } else {
74 *port = v;
75 }
[323a5aaf]76
77 asm volatile ("mf\n" ::: "memory");
[314f3a3c]78 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]79}
80
[3218648]81static inline void arch_pio_write_32(ioport32_t *port, uint32_t v)
[323a5aaf]82{
[86a34d3e]83 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
84 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]85
[86a34d3e]86 *((ioport32_t *)(IA64_IOSPACE_ADDRESS +
87 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
88 } else {
89 *port = v;
90 }
[323a5aaf]91
92 asm volatile ("mf\n" ::: "memory");
[314f3a3c]93 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]94}
95
[aa537a5a]96static inline void arch_pio_write_64(ioport64_t *port, uint64_t v)
97{
98 *port = v;
99
100 asm volatile ("mf\n" ::: "memory");
101 asm volatile ("mf.a\n" ::: "memory");
102}
103
[b5c2f56]104static inline uint8_t arch_pio_read_8(const ioport8_t *port)
[323a5aaf]105{
[86a34d3e]106 uint8_t v;
[1ae8f2b]107
[323a5aaf]108 asm volatile ("mf\n" ::: "memory");
109
[86a34d3e]110 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
111 uintptr_t prt = (uintptr_t) port;
112
113 v = *((ioport8_t *)(IA64_IOSPACE_ADDRESS +
114 ((prt & 0xfff) | ((prt >> 2) << 12))));
115 } else {
116 v = *port;
117 }
118
[314f3a3c]119 asm volatile ("mf.a\n" ::: "memory");
120
[86a34d3e]121 return v;
[323a5aaf]122}
123
[b5c2f56]124static inline uint16_t arch_pio_read_16(const ioport16_t *port)
[323a5aaf]125{
[86a34d3e]126 uint16_t v;
[1ae8f2b]127
[323a5aaf]128 asm volatile ("mf\n" ::: "memory");
129
[86a34d3e]130 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
131 uintptr_t prt = (uintptr_t) port;
132
133 v = *((ioport16_t *)(IA64_IOSPACE_ADDRESS +
134 ((prt & 0xfff) | ((prt >> 2) << 12))));
135 } else {
136 v = *port;
137 }
138
[314f3a3c]139 asm volatile ("mf.a\n" ::: "memory");
140
[86a34d3e]141 return v;
[323a5aaf]142}
143
[b5c2f56]144static inline uint32_t arch_pio_read_32(const ioport32_t *port)
[323a5aaf]145{
[86a34d3e]146 uint32_t v;
[1ae8f2b]147
[323a5aaf]148 asm volatile ("mf\n" ::: "memory");
149
[4449c6c]150 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
[86a34d3e]151 uintptr_t prt = (uintptr_t) port;
152
153 v = *((ioport32_t *)(IA64_IOSPACE_ADDRESS +
154 ((prt & 0xfff) | ((prt >> 2) << 12))));
155 } else {
156 v = *port;
157 }
158
[314f3a3c]159 asm volatile ("mf.a\n" ::: "memory");
160
[86a34d3e]161 return v;
[323a5aaf]162}
163
[aa537a5a]164static inline uint64_t arch_pio_read_64(const ioport64_t *port)
165{
166 uint64_t v;
167
168 asm volatile ("mf\n" ::: "memory");
169
170 v = *port;
171
172 asm volatile ("mf.a\n" ::: "memory");
173
174 return v;
175}
176
[323a5aaf]177#endif
178
179/** @}
180 */
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