source: mainline/uspace/lib/c/arch/ia64/include/ddi.h@ ab63b04e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ab63b04e was 314f3a3c, checked in by Jakub Jermar <jakub@…>, 14 years ago

Make sure mf.a is issued after each PIO.

  • Property mode set to 100644
File size: 3.9 KB
RevLine 
[323a5aaf]1/*
[1ae8f2b]2 * Copyright (c) 2005 Jakub Vana
[323a5aaf]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[1ae8f2b]29/** @addtogroup libcia64
[323a5aaf]30 * @{
31 */
32/** @file
33 */
34
35#ifndef LIBC_ia64_DDI_H_
36#define LIBC_ia64_DDI_H_
37
[1ae8f2b]38#include <sys/types.h>
[323a5aaf]39#include <libarch/types.h>
40
[36e9cd1]41#define IO_SPACE_BOUNDARY ((void *) (64 * 1024))
[323a5aaf]42
43uint64_t get_ia64_iospace_address(void);
44
45extern uint64_t ia64_iospace_address;
46
[1ae8f2b]47#define IA64_IOSPACE_ADDRESS \
48 (ia64_iospace_address ? \
49 ia64_iospace_address : \
50 (ia64_iospace_address = get_ia64_iospace_address()))
[323a5aaf]51
[1ae8f2b]52static inline void pio_write_8(ioport8_t *port, uint8_t v)
[323a5aaf]53{
[86a34d3e]54 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
55 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]56
[86a34d3e]57 *((ioport8_t *)(IA64_IOSPACE_ADDRESS +
58 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
59 } else {
60 *port = v;
61 }
[323a5aaf]62
63 asm volatile ("mf\n" ::: "memory");
[314f3a3c]64 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]65}
66
[1ae8f2b]67static inline void pio_write_16(ioport16_t *port, uint16_t v)
[323a5aaf]68{
[86a34d3e]69 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
70 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]71
[86a34d3e]72 *((ioport16_t *)(IA64_IOSPACE_ADDRESS +
73 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
74 } else {
75 *port = v;
76 }
[323a5aaf]77
78 asm volatile ("mf\n" ::: "memory");
[314f3a3c]79 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]80}
81
[1ae8f2b]82static inline void pio_write_32(ioport32_t *port, uint32_t v)
[323a5aaf]83{
[86a34d3e]84 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
85 uintptr_t prt = (uintptr_t) port;
[1ae8f2b]86
[86a34d3e]87 *((ioport32_t *)(IA64_IOSPACE_ADDRESS +
88 ((prt & 0xfff) | ((prt >> 2) << 12)))) = v;
89 } else {
90 *port = v;
91 }
[323a5aaf]92
93 asm volatile ("mf\n" ::: "memory");
[314f3a3c]94 asm volatile ("mf.a\n" ::: "memory");
[323a5aaf]95}
96
[1ae8f2b]97static inline uint8_t pio_read_8(ioport8_t *port)
[323a5aaf]98{
[86a34d3e]99 uint8_t v;
[1ae8f2b]100
[323a5aaf]101 asm volatile ("mf\n" ::: "memory");
102
[86a34d3e]103 if (port < (ioport8_t *) IO_SPACE_BOUNDARY) {
104 uintptr_t prt = (uintptr_t) port;
105
106 v = *((ioport8_t *)(IA64_IOSPACE_ADDRESS +
107 ((prt & 0xfff) | ((prt >> 2) << 12))));
108 } else {
109 v = *port;
110 }
111
[314f3a3c]112 asm volatile ("mf.a\n" ::: "memory");
113
[86a34d3e]114 return v;
[323a5aaf]115}
116
[1ae8f2b]117static inline uint16_t pio_read_16(ioport16_t *port)
[323a5aaf]118{
[86a34d3e]119 uint16_t v;
[1ae8f2b]120
[323a5aaf]121 asm volatile ("mf\n" ::: "memory");
122
[86a34d3e]123 if (port < (ioport16_t *) IO_SPACE_BOUNDARY) {
124 uintptr_t prt = (uintptr_t) port;
125
126 v = *((ioport16_t *)(IA64_IOSPACE_ADDRESS +
127 ((prt & 0xfff) | ((prt >> 2) << 12))));
128 } else {
129 v = *port;
130 }
131
[314f3a3c]132 asm volatile ("mf.a\n" ::: "memory");
133
[86a34d3e]134 return v;
[323a5aaf]135}
136
[1ae8f2b]137static inline uint32_t pio_read_32(ioport32_t *port)
[323a5aaf]138{
[86a34d3e]139 uint32_t v;
[1ae8f2b]140
[323a5aaf]141 asm volatile ("mf\n" ::: "memory");
142
[4449c6c]143 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) {
[86a34d3e]144 uintptr_t prt = (uintptr_t) port;
145
146 v = *((ioport32_t *)(IA64_IOSPACE_ADDRESS +
147 ((prt & 0xfff) | ((prt >> 2) << 12))));
148 } else {
149 v = *port;
150 }
151
[314f3a3c]152 asm volatile ("mf.a\n" ::: "memory");
153
[86a34d3e]154 return v;
[323a5aaf]155}
156
157#endif
158
159/** @}
160 */
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