source: mainline/uspace/lib/c/arch/ia32/src/fibril.S@ d5955a5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d5955a5 was e74b24f, checked in by Jakub Jermar <jakub@…>, 11 years ago

Autogenerate ia32 fibril context_t and its offsets.

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File size: 3.1 KB
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1#
2# Copyright (c) 2001-2004 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <libarch/fibril_context.h>
30
31.text
32
33.global context_save
34.global context_restore
35
36## Save current CPU context
37#
38# Save CPU context to the context_t variable
39# pointed by the 1st argument. Returns 1 in EAX.
40#
41context_save:
42 movl 0(%esp), %eax # the caller's return %eip
43 movl 4(%esp), %edx # address of the context variable to save context to
44
45 # save registers to the context structure
46 movl %esp, CONTEXT_OFFSET_SP(%edx) # %esp -> ctx->sp
47 movl %eax, CONTEXT_OFFSET_PC(%edx) # %eip -> ctx->pc
48 movl %ebx, CONTEXT_OFFSET_EBX(%edx) # %ebx -> ctx->ebx
49 movl %esi, CONTEXT_OFFSET_ESI(%edx) # %esi -> ctx->esi
50 movl %edi, CONTEXT_OFFSET_EDI(%edx) # %edi -> ctx->edi
51 movl %ebp, CONTEXT_OFFSET_EBP(%edx) # %ebp -> ctx->ebp
52
53 # save TLS
54 movl %gs:0, %eax
55 movl %eax, CONTEXT_OFFSET_TLS(%edx) # tls -> ctx->tls
56
57 xorl %eax, %eax # context_save returns 1
58 incl %eax
59 ret
60
61## Restore saved CPU context
62#
63# Restore CPU context from context_t variable
64# pointed by the 1st argument. Returns 0 in EAX.
65#
66context_restore:
67 movl 4(%esp), %eax # address of the context variable to restore context from
68
69 # restore registers from the context structure
70 movl CONTEXT_OFFSET_SP(%eax),%esp # ctx->sp -> %esp
71 movl CONTEXT_OFFSET_PC(%eax),%edx # ctx->pc -> \pc
72 movl CONTEXT_OFFSET_EBX(%eax),%ebx # ctx->ebx -> %ebx
73 movl CONTEXT_OFFSET_ESI(%eax),%esi # ctx->esi -> %esi
74 movl CONTEXT_OFFSET_EDI(%eax),%edi # ctx->edi -> %edi
75 movl CONTEXT_OFFSET_EBP(%eax),%ebp # ctx->ebp -> %ebp
76
77 movl %edx, 0(%esp) # ctx->pc -> saver's return %eip
78
79 # set thread local storage
80 pushl %edx
81 movl CONTEXT_OFFSET_TLS(%eax), %edx # Set arg1 to TLS addr
82 movl $1, %eax # Syscall SYS_TLS_SET
83 int $0x30
84 popl %edx
85
86 xorl %eax, %eax # context_restore returns 0
87 ret
88
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