source: mainline/uspace/lib/c/arch/ia32/_link.ld.in@ 9f5cf68

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9f5cf68 was 9bcdbc5, checked in by Martin Decky <martin@…>, 13 years ago

make sure the code in .init is always aligned reasonably
(despite .interp section being also present in the text segment)

  • Property mode set to 100644
File size: 2.1 KB
RevLine 
[729f774f]1#ifndef SHLIB
[1b1164e8]2STARTUP(LIBC_PATH/arch/UARCH/src/entry.o)
[3eddaff]3ENTRY(__entry)
[729f774f]4#endif
[3eddaff]5
[d03e156]6PHDRS {
[54146a0]7#if defined(LOADER) || defined(DLEXE)
[c53d906]8 interp PT_INTERP;
9 text PT_LOAD FILEHDR PHDRS FLAGS(5);
10#else
[f563126]11 text PT_LOAD FLAGS(5);
[c53d906]12#endif
[a3aa1e1]13 data PT_LOAD FLAGS(6);
[729f774f]14#if defined(SHLIB) || defined(DLEXE)
15 dynamic PT_DYNAMIC;
16#endif
[1e00216]17 debug PT_NOTE;
[d03e156]18}
19
[3eddaff]20SECTIONS {
[729f774f]21#ifdef LOADER
[c53d906]22 . = 0x70001000 + SIZEOF_HEADERS;
23#else
[1cc2974]24 . = 0x1000 + SIZEOF_HEADERS;
[c53d906]25#endif
[e1c0260]26
27#if defined(LOADER) || defined(DLEXE)
28 .interp : {
29 *(.interp);
30 } :interp :text
31#endif
32
[9bcdbc5]33 /* Make sure the code is aligned reasonably */
34 . = ALIGN(., 16);
35
[1cc2974]36 .init : {
[a3aa1e1]37 *(.init);
38 } :text
[f563126]39
[a3aa1e1]40 .text : {
[c81e5e0]41 *(.text .text.*);
42 *(.rodata .rodata.*);
[a3aa1e1]43 } :text
[9bcdbc5]44
[729f774f]45#if defined(SHLIB) || defined(DLEXE)
46 .rel.plt : {
47 *(.rel.plt);
48 }
49 /*
50 *.rel.dyn MUST FOLLOW IMMEDIATELY after .rel.plt
51 * without alignment gap or DT_REL will be broken
52 */
53 .rel.dyn : {
54 *(.rel.*);
55 } :text
56
57 .plt : {
58 *(.plt);
59 } :text
60
61 .dynsym : {
62 *(.dynsym);
63 } :text
[f563126]64
[729f774f]65 .dynstr : {
66 *(.dynstr);
67 } :text
[54146a0]68
69 .hash : {
70 *(.hash);
71 } :text
[729f774f]72#endif
[1cc2974]73 . = . + 0x1000;
[f563126]74
[729f774f]75#if defined(SHLIB) || defined(DLEXE)
76 .dynamic : {
77 *(.dynamic);
78 } :data :dynamic
79#endif
80
[1cc2974]81 .data : {
[a3aa1e1]82 *(.data);
83 } :data
[f563126]84
[729f774f]85#if defined(SHLIB) || defined(DLEXE)
86 .data.rel : {
[9bcdbc5]87 *(.data.rel .data.rel.*);
[729f774f]88 } :data
[9bcdbc5]89
[729f774f]90 .got : {
[9bcdbc5]91 *(.got);
[729f774f]92 } :data
[9bcdbc5]93
[729f774f]94 .got.plt : {
[9bcdbc5]95 *(.got.plt);
[729f774f]96 } :data
97#endif
98
99#ifndef DLEXE
[c4c5de5]100 .tdata : {
101 _tdata_start = .;
102 *(.tdata);
[f563126]103 *(.gnu.linkonce.tb.*);
[c4c5de5]104 _tdata_end = .;
105 _tbss_start = .;
106 *(.tbss);
107 _tbss_end = .;
108 } :data
[f563126]109
[e622f0a8]110 _tls_alignment = ALIGNOF(.tdata);
[729f774f]111#endif
[f563126]112
[a3aa1e1]113 .bss : {
[54146a0]114 *(.dynbss);
[f563126]115 *(COMMON);
116 *(.bss);
[a3aa1e1]117 } :data
[d03e156]118
[1e00216]119#ifdef CONFIG_LINE_DEBUG
120 .comment 0 : { *(.comment); } :debug
121 .debug_abbrev 0 : { *(.debug_abbrev); } :debug
122 .debug_aranges 0 : { *(.debug_aranges); } :debug
123 .debug_info 0 : { *(.debug_info); } :debug
124 .debug_line 0 : { *(.debug_line); } :debug
125 .debug_loc 0 : { *(.debug_loc); } :debug
126 .debug_pubnames 0 : { *(.debug_pubnames); } :debug
127 .debug_pubtypes 0 : { *(.debug_pubtypes); } :debug
128 .debug_ranges 0 : { *(.debug_ranges); } :debug
129 .debug_str 0 : { *(.debug_str); } :debug
130#endif
131
[d03e156]132 /DISCARD/ : {
[a3aa1e1]133 *(*);
[d03e156]134 }
[3eddaff]135}
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