source: mainline/uspace/lib/c/arch/arm64/src/syscall.c

Last change on this file was 84176f3, checked in by Jakub Jermář <jakub@…>, 6 years ago

arm64: Add support for the architecture

This changeset adds basic support to run HelenOS on AArch64, targeting
the QEMU virt platform.

Boot:

  • Boot relies on the EDK II firmware, GRUB2 for EFI and the HelenOS bootloader (UEFI application). EDK II loads GRUB2 from a CD, GRUB2 loads the HelenOS bootloader (via UEFI) which loads OS components.
  • UEFI applications use the PE/COFF format and must be relocatable. The first problem is solved by manually having the PE/COFF headers and tables written in assembler. The relocatable requirement is addressed by compiling the code with -fpic and having the bootloader relocate itself at its startup.

Kernel:

  • Kernel code for AArch64 consists mostly of stubbing out various architecture-specific hooks: virtual memory management, interrupt and exception handling, context switching (including FPU lazy switching), support for virtual timer, atomic sequences and barriers, cache and TLB maintenance, thread and process initialization.
  • The patch adds a kernel driver for GICv2 (interrupt controller).
  • The PL011 kernel driver is extended to allow userspace to take ownership of the console.
  • The current code is not able to dynamically obtain information about available devices on the underlying machine. The port instead implements a machine-func interface similar to the one implemented by arm32. It defines a machine for the QEMU AArch64 virt platform. The configuration (device addresses and IRQ numbers) is then baked into the machine definition.

User space:

  • Uspace code for AArch64 similarly mostly implements architecture-specific hooks: context saving/restoring, syscall support, TLS support.

The patchset allows to boot the system but user interaction with the OS
is not yet possible.
  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2015 Petr Pavlu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup libcarm64
30 * @{
31 */
32/** @file
33 * @brief Syscall routine.
34 */
35
36#include <libc.h>
37
38/** Syscall routine.
39 *
40 * Stores p1-p6, id to r0-r6 registers and calls <code>svc</code> instruction.
41 * Returned value is read from r0 register.
42 *
43 * @param p1 Parameter 1.
44 * @param p2 Parameter 2.
45 * @param p3 Parameter 3.
46 * @param p4 Parameter 4.
47 * @param p5 Parameter 5.
48 * @param p6 Parameter 6.
49 * @param id Number of syscall.
50 *
51 * @return Syscall return value.
52 */
53sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
54 const sysarg_t p4, const sysarg_t p5, const sysarg_t p6,
55 const syscall_t id)
56{
57 register sysarg_t __arm_reg_x0 asm("x0") = p1;
58 register sysarg_t __arm_reg_x1 asm("x1") = p2;
59 register sysarg_t __arm_reg_x2 asm("x2") = p3;
60 register sysarg_t __arm_reg_x3 asm("x3") = p4;
61 register sysarg_t __arm_reg_x4 asm("x4") = p5;
62 register sysarg_t __arm_reg_x5 asm("x5") = p6;
63 register sysarg_t __arm_reg_x6 asm("x6") = id;
64
65 asm volatile (
66 "svc #0"
67 : "=r" (__arm_reg_x0)
68 : "r" (__arm_reg_x0),
69 "r" (__arm_reg_x1),
70 "r" (__arm_reg_x2),
71 "r" (__arm_reg_x3),
72 "r" (__arm_reg_x4),
73 "r" (__arm_reg_x5),
74 "r" (__arm_reg_x6)
75 :
76 /*
77 * Clobber memory too as some arguments might be actually
78 * pointers.
79 */
80 "memory"
81 );
82
83 return __arm_reg_x0;
84}
85
86/** @}
87 */
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