[3515533] | 1 | #include <errno.h>
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| 2 | #include <usb/debug.h>
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[18e35a7] | 3 | #include <usb/usb.h>
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[3515533] | 4 |
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[de0e6b3] | 5 | #include "utils/malloc32.h"
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[9600516] | 6 |
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[bf5a3be] | 7 | #include "debug.h"
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[3515533] | 8 | #include "name.h"
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| 9 | #include "uhci.h"
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| 10 |
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[9ee87f6] | 11 | static int uhci_init_transfer_lists(transfer_list_t list[]);
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| 12 | static int uhci_clean_finished(void *arg);
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[0535ee4] | 13 | static int uhci_debug_checker(void *arg);
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[7977fa1] | 14 |
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[3515533] | 15 | int uhci_init(device_t *device, void *regs)
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| 16 | {
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[9ee87f6] | 17 | assert(device);
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| 18 | uhci_print_info("Initializing device at address %p.\n", device);
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| 19 |
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| 20 | #define CHECK_RET_FREE_INSTANCE(message...) \
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| 21 | if (ret != EOK) { \
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| 22 | uhci_print_error(message); \
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| 23 | if (instance) { \
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| 24 | free(instance); \
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| 25 | } \
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| 26 | return ret; \
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| 27 | } else (void) 0
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[3515533] | 28 |
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| 29 | /* create instance */
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[d93ff502] | 30 | uhci_t *instance = malloc(sizeof(uhci_t));
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[9ee87f6] | 31 | int ret = instance ? EOK : ENOMEM;
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| 32 | CHECK_RET_FREE_INSTANCE("Failed to allocate uhci driver instance.\n");
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| 33 |
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| 34 | bzero(instance, sizeof(uhci_t));
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[3515533] | 35 |
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[18e35a7] | 36 | /* init address keeper(libusb) */
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[9ee87f6] | 37 | usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX);
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[d93ff502] | 38 | uhci_print_verbose("Initialized address manager.\n");
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[18e35a7] | 39 |
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[3515533] | 40 | /* allow access to hc control registers */
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| 41 | regs_t *io;
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[9ee87f6] | 42 | ret = pio_enable(regs, sizeof(regs_t), (void**)&io);
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| 43 | CHECK_RET_FREE_INSTANCE("Failed to gain access to registers at %p.\n", io);
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[3515533] | 44 | instance->registers = io;
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[d93ff502] | 45 | uhci_print_verbose("Device registers accessible.\n");
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[3515533] | 46 |
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[9ee87f6] | 47 | /* init transfer lists */
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| 48 | ret = uhci_init_transfer_lists(instance->transfers);
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| 49 | CHECK_RET_FREE_INSTANCE("Failed to initialize transfer lists.\n");
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[d93ff502] | 50 | uhci_print_verbose("Transfer lists initialized.\n");
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[9ee87f6] | 51 |
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[3515533] | 52 | /* init root hub */
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[9600516] | 53 | ret = uhci_root_hub_init(&instance->root_hub, device,
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| 54 | (char*)regs + UHCI_ROOT_HUB_PORT_REGISTERS_OFFSET);
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[9ee87f6] | 55 | CHECK_RET_FREE_INSTANCE("Failed to initialize root hub driver.\n");
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[9600516] | 56 |
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[d93ff502] | 57 | uhci_print_verbose("Initializing frame list.\n");
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[d1984e0] | 58 | instance->frame_list = get_page();
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| 59 | // memalign32(sizeof(link_pointer_t) * UHCI_FRAME_LIST_COUNT, 4096);
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[9600516] | 60 | if (instance->frame_list == NULL) {
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| 61 | uhci_print_error("Failed to allocate frame list pointer.\n");
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| 62 | uhci_root_hub_fini(&instance->root_hub);
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| 63 | free(instance);
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| 64 | return ENOMEM;
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| 65 | }
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| 66 |
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[9ee87f6] | 67 | /* initialize all frames to point to the first queue head */
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| 68 | unsigned i = 0;
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| 69 | const uint32_t queue =
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| 70 | instance->transfers[USB_TRANSFER_INTERRUPT].queue_head_pa
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| 71 | | LINK_POINTER_QUEUE_HEAD_FLAG;
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| 72 | for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
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| 73 | instance->frame_list[i] = queue;
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| 74 | }
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| 75 |
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[9600516] | 76 | const uintptr_t pa = (uintptr_t)addr_to_phys(instance->frame_list);
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| 77 |
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| 78 | pio_write_32(&instance->registers->flbaseadd, (uint32_t)pa);
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| 79 |
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[9ee87f6] | 80 | instance->cleaner = fibril_create(uhci_clean_finished, instance);
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| 81 | fibril_add_ready(instance->cleaner);
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[3515533] | 82 |
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[0535ee4] | 83 | instance->debug_checker = fibril_create(uhci_debug_checker, instance);
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| 84 | fibril_add_ready(instance->debug_checker);
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| 85 |
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[d1984e0] | 86 | uhci_print_verbose("Starting UHCI HC.\n");
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| 87 | uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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| 88 | cmd |= UHCI_CMD_RUN_STOP | UHCI_CMD_CONFIGURE;
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| 89 | pio_write_16(&instance->registers->usbcmd, cmd);
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| 90 |
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[3515533] | 91 | device->driver_data = instance;
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| 92 | return EOK;
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| 93 | }
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| 94 | /*----------------------------------------------------------------------------*/
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[9ee87f6] | 95 | int uhci_init_transfer_lists(transfer_list_t transfers[])
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[643b983] | 96 | {
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| 97 | //TODO:refactor
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| 98 | transfers[USB_TRANSFER_ISOCHRONOUS].first = NULL;
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| 99 | transfers[USB_TRANSFER_ISOCHRONOUS].last = NULL;
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[b00163f] | 100 |
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[643b983] | 101 | int ret;
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| 102 | ret = transfer_list_init(&transfers[USB_TRANSFER_BULK], NULL);
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| 103 | if (ret != EOK) {
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[b00163f] | 104 | uhci_print_error("Failed to initialize bulk queue.\n");
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[643b983] | 105 | return ret;
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| 106 | }
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| 107 |
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| 108 | ret = transfer_list_init(
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| 109 | &transfers[USB_TRANSFER_CONTROL], &transfers[USB_TRANSFER_BULK]);
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| 110 | if (ret != EOK) {
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[b00163f] | 111 | uhci_print_error("Failed to initialize control queue.\n");
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[643b983] | 112 | transfer_list_fini(&transfers[USB_TRANSFER_BULK]);
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| 113 | return ret;
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| 114 | }
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| 115 |
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| 116 | ret = transfer_list_init(
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| 117 | &transfers[USB_TRANSFER_INTERRUPT], &transfers[USB_TRANSFER_CONTROL]);
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| 118 | if (ret != EOK) {
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[b00163f] | 119 | uhci_print_error("Failed to initialize interrupt queue.\n");
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[643b983] | 120 | transfer_list_fini(&transfers[USB_TRANSFER_CONTROL]);
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| 121 | transfer_list_fini(&transfers[USB_TRANSFER_BULK]);
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| 122 | return ret;
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| 123 | }
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| 124 |
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| 125 | return EOK;
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| 126 | }
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[b00163f] | 127 | /*----------------------------------------------------------------------------*/
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[d93ff502] | 128 | int uhci_transfer(
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[b00163f] | 129 | device_t *dev,
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[d03ade7] | 130 | usb_target_t target,
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[b00163f] | 131 | usb_transfer_type_t transfer_type,
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[d93ff502] | 132 | bool toggle,
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[d03ade7] | 133 | usb_packet_id pid,
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[b00163f] | 134 | void *buffer, size_t size,
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| 135 | usbhc_iface_transfer_out_callback_t callback_out,
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| 136 | usbhc_iface_transfer_in_callback_t callback_in,
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[d03ade7] | 137 | void *arg )
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[b00163f] | 138 | {
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| 139 | // TODO: Add support for isochronous transfers
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| 140 | if (transfer_type == USB_TRANSFER_ISOCHRONOUS)
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| 141 | return ENOTSUP;
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| 142 |
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| 143 | if (size >= 1024)
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| 144 | return ENOTSUP;
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| 145 |
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| 146 | transfer_descriptor_t *td = NULL;
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| 147 | callback_t *job = NULL;
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| 148 | int ret = EOK;
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| 149 |
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| 150 | #define CHECK_RET_TRANS_FREE_JOB_TD(message) \
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| 151 | if (ret != EOK) { \
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| 152 | uhci_print_error(message); \
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| 153 | if (job) { \
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[45c4f5a] | 154 | callback_dispose(job); \
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[b00163f] | 155 | } \
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[de0e6b3] | 156 | if (td) { free32(td); } \
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[b00163f] | 157 | return ret; \
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| 158 | } else (void) 0
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| 159 |
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| 160 |
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[45c4f5a] | 161 | job = callback_get(dev, buffer, size, callback_in, callback_out, arg);
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| 162 | ret = job ? EOK : ENOMEM;
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[b00163f] | 163 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to allocate callback structure.\n");
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| 164 |
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[eb03e92] | 165 | td = transfer_descriptor_get(3, size, false, target, pid);
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[d03ade7] | 166 | ret = td ? EOK : ENOMEM;
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[eb03e92] | 167 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to setup transfer descriptor.\n");
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[b00163f] | 168 |
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| 169 | td->callback = job;
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| 170 |
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| 171 | assert(dev);
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| 172 | uhci_t *instance = (uhci_t*)dev->driver_data;
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| 173 | assert(instance);
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| 174 |
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| 175 | ret = transfer_list_append(&instance->transfers[transfer_type], td);
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| 176 | CHECK_RET_TRANS_FREE_JOB_TD("Failed to append transfer descriptor.\n");
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| 177 |
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| 178 | return EOK;
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| 179 | }
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[9ee87f6] | 180 | /*----------------------------------------------------------------------------*/
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| 181 | int uhci_clean_finished(void* arg)
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| 182 | {
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| 183 | uhci_print_verbose("Started cleaning fibril.\n");
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| 184 | uhci_t *instance = (uhci_t*)arg;
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| 185 | assert(instance);
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[579dec2] | 186 |
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[9ee87f6] | 187 | while(1) {
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[d1984e0] | 188 | uhci_print_verbose("Running cleaning fibril on: %p.\n", instance);
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[579dec2] | 189 | /* iterate all transfer queues */
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[0535ee4] | 190 | int i = 0;
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[d1984e0] | 191 | for (; i < TRANSFER_QUEUES; ++i) {
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[579dec2] | 192 | /* Remove inactive transfers from the top of the queue
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| 193 | * TODO: should I reach queue head or is this enough? */
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[0535ee4] | 194 | volatile transfer_descriptor_t * it =
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| 195 | instance->transfers[i].first;
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| 196 | uhci_print_verbose("Running cleaning fibril on queue: %p (%s).\n",
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| 197 | &instance->transfers[i], it ? "SOMETHING" : "EMPTY");
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[579dec2] | 198 | while (instance->transfers[i].first &&
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| 199 | !(instance->transfers[i].first->status & TD_STATUS_ERROR_ACTIVE)) {
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| 200 | transfer_descriptor_t *transfer = instance->transfers[i].first;
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[0535ee4] | 201 | uhci_print_info("Inactive transfer calling callback.\n");
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[579dec2] | 202 | instance->transfers[i].first = transfer->next_va;
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[de0e6b3] | 203 | transfer_descriptor_dispose(transfer);
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[579dec2] | 204 | }
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| 205 | if (!instance->transfers[i].first)
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| 206 | instance->transfers[i].last = instance->transfers[i].first;
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| 207 | }
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[0535ee4] | 208 | async_usleep(UHCI_CLEANER_TIMEOUT);
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[9ee87f6] | 209 | }
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| 210 | return EOK;
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| 211 | }
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[0535ee4] | 212 | /*---------------------------------------------------------------------------*/
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| 213 | int uhci_debug_checker(void *arg)
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| 214 | {
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| 215 | return 0;
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| 216 | uhci_t *instance = (uhci_t*)arg;
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| 217 | assert(instance);
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| 218 | while (1) {
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| 219 | uint16_t reg;
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| 220 | reg = pio_read_16(&instance->registers->usbcmd);
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| 221 | uhci_print_verbose("Command register: %X\n", reg);
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| 222 | reg = pio_read_16(&instance->registers->usbsts);
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| 223 | uhci_print_verbose("Status register: %X\n", reg);
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| 224 | uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd);
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| 225 | uhci_print_verbose("Framelist address: %p vs. %p.\n",
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| 226 | frame_list, addr_to_phys(instance->frame_list));
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| 227 | int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
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| 228 | uhci_print_verbose("Framelist item: %d \n", frnum );
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| 229 |
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| 230 | queue_head_t* qh = instance->transfers[USB_TRANSFER_INTERRUPT].queue_head;
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| 231 | uhci_print_verbose("Interrupt QH: %p vs. %p.\n",
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| 232 | instance->frame_list[frnum], addr_to_phys(qh));
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| 233 |
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| 234 | uhci_print_verbose("Control QH: %p vs. %p.\n", qh->next_queue,
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| 235 | addr_to_phys(instance->transfers[USB_TRANSFER_CONTROL].queue_head));
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| 236 | qh = instance->transfers[USB_TRANSFER_CONTROL].queue_head;
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| 237 |
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| 238 | uhci_print_verbose("Bulk QH: %p vs. %p.\n", qh->next_queue,
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| 239 | addr_to_phys(instance->transfers[USB_TRANSFER_BULK].queue_head));
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| 240 |
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| 241 | async_usleep(UHCI_DEBUGER_TIMEOUT);
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| 242 | }
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| 243 | return 0;
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| 244 | }
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