source: mainline/uspace/drv/uhci-hcd/uhci_hc.c@ 91579d5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 91579d5 was a9f91cd, checked in by Jan Vesely <jano.vesely@…>, 15 years ago

Refactoring final touches

  • Property mode set to 100644
File size: 14.7 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup usb
29 * @{
30 */
31/** @file
32 * @brief UHCI driver
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42#include <usb_iface.h>
43
44#include "uhci_hc.h"
45
46static irq_cmd_t uhci_cmds[] = {
47 {
48 .cmd = CMD_PIO_READ_16,
49 .addr = NULL, /* patched for every instance */
50 .dstarg = 1
51 },
52 {
53 .cmd = CMD_PIO_WRITE_16,
54 .addr = NULL, /* pathed for every instance */
55 .value = 0x1f
56 },
57 {
58 .cmd = CMD_ACCEPT
59 }
60};
61
62/** Gets USB address of the calling device.
63 *
64 * @param[in] fun UHCI hc function.
65 * @param[in] handle Handle of the device seeking address.
66 * @param[out] address Place to store found address.
67 * @return Error code.
68 */
69/*----------------------------------------------------------------------------*/
70static int uhci_hc_init_transfer_lists(uhci_hc_t *instance);
71static int uhci_hc_init_mem_structures(uhci_hc_t *instance);
72static void uhci_hc_init_hw(uhci_hc_t *instance);
73
74static int uhci_hc_interrupt_emulator(void *arg);
75static int uhci_hc_debug_checker(void *arg);
76
77static bool allowed_usb_packet(
78 bool low_speed, usb_transfer_type_t transfer, size_t size);
79/*----------------------------------------------------------------------------*/
80/** Initializes UHCI hcd driver structure
81 *
82 * @param[in] instance Memory place to initialize.
83 * @param[in] fun DDF function.
84 * @param[in] regs Address of I/O control registers.
85 * @param[in] size Size of I/O control registers.
86 * @return Error code.
87 * @note Should be called only once on any structure.
88 */
89int uhci_hc_init(uhci_hc_t *instance, ddf_fun_t *fun, void *regs, size_t reg_size)
90{
91 assert(reg_size >= sizeof(regs_t));
92 int ret;
93
94#define CHECK_RET_DEST_FUN_RETURN(ret, message...) \
95 if (ret != EOK) { \
96 usb_log_error(message); \
97 if (instance->ddf_instance) \
98 ddf_fun_destroy(instance->ddf_instance); \
99 return ret; \
100 } else (void) 0
101
102 /* Setup UHCI function. */
103 instance->ddf_instance = fun;
104
105 /* allow access to hc control registers */
106 regs_t *io;
107 ret = pio_enable(regs, reg_size, (void**)&io);
108 CHECK_RET_DEST_FUN_RETURN(ret,
109 "Failed(%d) to gain access to registers at %p: %s.\n",
110 ret, str_error(ret), io);
111 instance->registers = io;
112 usb_log_debug("Device registers at %p(%u) accessible.\n",
113 io, reg_size);
114
115 ret = uhci_hc_init_mem_structures(instance);
116 CHECK_RET_DEST_FUN_RETURN(ret,
117 "Failed to initialize UHCI memory structures.\n");
118
119 uhci_hc_init_hw(instance);
120 instance->cleaner =
121 fibril_create(uhci_hc_interrupt_emulator, instance);
122 fibril_add_ready(instance->cleaner);
123
124 instance->debug_checker = fibril_create(uhci_hc_debug_checker, instance);
125 fibril_add_ready(instance->debug_checker);
126
127 usb_log_info("Started UHCI driver.\n");
128 return EOK;
129#undef CHECK_RET_DEST_FUN_RETURN
130}
131/*----------------------------------------------------------------------------*/
132/** Initializes UHCI hcd hw resources.
133 *
134 * @param[in] instance UHCI structure to use.
135 */
136void uhci_hc_init_hw(uhci_hc_t *instance)
137{
138 assert(instance);
139 regs_t *registers = instance->registers;
140
141 /* Reset everything, who knows what touched it before us */
142 pio_write_16(&registers->usbcmd, UHCI_CMD_GLOBAL_RESET);
143 async_usleep(10000); /* 10ms according to USB spec */
144 pio_write_16(&registers->usbcmd, 0);
145
146 /* Reset hc, all states and counters */
147 pio_write_16(&registers->usbcmd, UHCI_CMD_HCRESET);
148 do { async_usleep(10); }
149 while ((pio_read_16(&registers->usbcmd) & UHCI_CMD_HCRESET) != 0);
150
151 /* Set framelist pointer */
152 const uint32_t pa = addr_to_phys(instance->frame_list);
153 pio_write_32(&registers->flbaseadd, pa);
154
155 /* Enable all interrupts, but resume interrupt */
156// pio_write_16(&instance->registers->usbintr,
157// UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
158
159 uint16_t status = pio_read_16(&registers->usbcmd);
160 if (status != 0)
161 usb_log_warning("Previous command value: %x.\n", status);
162
163 /* Start the hc with large(64B) packet FSBR */
164 pio_write_16(&registers->usbcmd,
165 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
166}
167/*----------------------------------------------------------------------------*/
168/** Initializes UHCI hcd memory structures.
169 *
170 * @param[in] instance UHCI structure to use.
171 * @return Error code
172 * @note Should be called only once on any structure.
173 */
174int uhci_hc_init_mem_structures(uhci_hc_t *instance)
175{
176 assert(instance);
177#define CHECK_RET_DEST_CMDS_RETURN(ret, message...) \
178 if (ret != EOK) { \
179 usb_log_error(message); \
180 if (instance->interrupt_code.cmds != NULL) \
181 free(instance->interrupt_code.cmds); \
182 return ret; \
183 } else (void) 0
184
185 /* Init interrupt code */
186 instance->interrupt_code.cmds = malloc(sizeof(uhci_cmds));
187 int ret = (instance->interrupt_code.cmds == NULL) ? ENOMEM : EOK;
188 CHECK_RET_DEST_CMDS_RETURN(ret,
189 "Failed to allocate interrupt cmds space.\n");
190
191 {
192 irq_cmd_t *interrupt_commands = instance->interrupt_code.cmds;
193 memcpy(interrupt_commands, uhci_cmds, sizeof(uhci_cmds));
194 interrupt_commands[0].addr =
195 (void*)&instance->registers->usbsts;
196 interrupt_commands[1].addr =
197 (void*)&instance->registers->usbsts;
198 instance->interrupt_code.cmdcount =
199 sizeof(uhci_cmds) / sizeof(irq_cmd_t);
200 }
201
202 /* Init transfer lists */
203 ret = uhci_hc_init_transfer_lists(instance);
204 CHECK_RET_DEST_CMDS_RETURN(ret, "Failed to init transfer lists.\n");
205 usb_log_debug("Initialized transfer lists.\n");
206
207 /* Init USB frame list page*/
208 instance->frame_list = get_page();
209 ret = instance ? EOK : ENOMEM;
210 CHECK_RET_DEST_CMDS_RETURN(ret, "Failed to get frame list page.\n");
211 usb_log_debug("Initialized frame list.\n");
212
213 /* Set all frames to point to the first queue head */
214 const uint32_t queue =
215 instance->transfers_interrupt.queue_head_pa
216 | LINK_POINTER_QUEUE_HEAD_FLAG;
217
218 unsigned i = 0;
219 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
220 instance->frame_list[i] = queue;
221 }
222
223 /* Init device keeper*/
224 device_keeper_init(&instance->device_manager);
225 usb_log_debug("Initialized device manager.\n");
226
227 return EOK;
228#undef CHECK_RET_DEST_CMDS_RETURN
229}
230/*----------------------------------------------------------------------------*/
231/** Initializes UHCI hcd transfer lists.
232 *
233 * @param[in] instance UHCI structure to use.
234 * @return Error code
235 * @note Should be called only once on any structure.
236 */
237int uhci_hc_init_transfer_lists(uhci_hc_t *instance)
238{
239 assert(instance);
240#define CHECK_RET_CLEAR_RETURN(ret, message...) \
241 if (ret != EOK) { \
242 usb_log_error(message); \
243 transfer_list_fini(&instance->transfers_bulk_full); \
244 transfer_list_fini(&instance->transfers_control_full); \
245 transfer_list_fini(&instance->transfers_control_slow); \
246 transfer_list_fini(&instance->transfers_interrupt); \
247 return ret; \
248 } else (void) 0
249
250 /* initialize TODO: check errors */
251 int ret;
252 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
253 CHECK_RET_CLEAR_RETURN(ret, "Failed to init BULK list.");
254
255 ret = transfer_list_init(
256 &instance->transfers_control_full, "CONTROL_FULL");
257 CHECK_RET_CLEAR_RETURN(ret, "Failed to init CONTROL FULL list.");
258
259 ret = transfer_list_init(
260 &instance->transfers_control_slow, "CONTROL_SLOW");
261 CHECK_RET_CLEAR_RETURN(ret, "Failed to init CONTROL SLOW list.");
262
263 ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
264 CHECK_RET_CLEAR_RETURN(ret, "Failed to init INTERRUPT list.");
265
266 transfer_list_set_next(&instance->transfers_control_full,
267 &instance->transfers_bulk_full);
268 transfer_list_set_next(&instance->transfers_control_slow,
269 &instance->transfers_control_full);
270 transfer_list_set_next(&instance->transfers_interrupt,
271 &instance->transfers_control_slow);
272
273 /*FSBR*/
274#ifdef FSBR
275 transfer_list_set_next(&instance->transfers_bulk_full,
276 &instance->transfers_control_full);
277#endif
278
279 /* Assign pointers to be used during scheduling */
280 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_INTERRUPT] =
281 &instance->transfers_interrupt;
282 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_INTERRUPT] =
283 &instance->transfers_interrupt;
284 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_CONTROL] =
285 &instance->transfers_control_full;
286 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_CONTROL] =
287 &instance->transfers_control_slow;
288 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_BULK] =
289 &instance->transfers_bulk_full;
290
291 return EOK;
292#undef CHECK_RET_CLEAR_RETURN
293}
294/*----------------------------------------------------------------------------*/
295/** Schedules batch for execution.
296 *
297 * @param[in] instance UHCI structure to use.
298 * @param[in] batch Transfer batch to schedule.
299 * @return Error code
300 */
301int uhci_hc_schedule(uhci_hc_t *instance, batch_t *batch)
302{
303 assert(instance);
304 assert(batch);
305 const int low_speed = (batch->speed == USB_SPEED_LOW);
306 if (!allowed_usb_packet(
307 low_speed, batch->transfer_type, batch->max_packet_size)) {
308 usb_log_warning(
309 "Invalid USB packet specified %s SPEED %d %zu.\n",
310 low_speed ? "LOW" : "FULL" , batch->transfer_type,
311 batch->max_packet_size);
312 return ENOTSUP;
313 }
314 /* TODO: check available bandwith here */
315
316 transfer_list_t *list =
317 instance->transfers[batch->speed][batch->transfer_type];
318 assert(list);
319 transfer_list_add_batch(list, batch);
320
321 return EOK;
322}
323/*----------------------------------------------------------------------------*/
324/** Takes action based on the interrupt cause.
325 *
326 * @param[in] instance UHCI structure to use.
327 * @param[in] status Value of the stsatus regiser at the time of interrupt.
328 */
329void uhci_hc_interrupt(uhci_hc_t *instance, uint16_t status)
330{
331 assert(instance);
332 /* TODO: Check interrupt cause here */
333 /* Lower 2 bits are transaction error and transaction complete */
334 if (status & 0x3) {
335 transfer_list_remove_finished(&instance->transfers_interrupt);
336 transfer_list_remove_finished(&instance->transfers_control_slow);
337 transfer_list_remove_finished(&instance->transfers_control_full);
338 transfer_list_remove_finished(&instance->transfers_bulk_full);
339 }
340}
341/*----------------------------------------------------------------------------*/
342/** Polling function, emulates interrupts.
343 *
344 * @param[in] arg UHCI structure to use.
345 * @return EOK
346 */
347int uhci_hc_interrupt_emulator(void* arg)
348{
349 usb_log_debug("Started interrupt emulator.\n");
350 uhci_hc_t *instance = (uhci_hc_t*)arg;
351 assert(instance);
352
353 while (1) {
354 /* read and ack interrupts */
355 uint16_t status = pio_read_16(&instance->registers->usbsts);
356 pio_write_16(&instance->registers->usbsts, 0x1f);
357 if (status != 0)
358 usb_log_debug2("UHCI status: %x.\n", status);
359 uhci_hc_interrupt(instance, status);
360 async_usleep(UHCI_CLEANER_TIMEOUT);
361 }
362 return EOK;
363}
364/*---------------------------------------------------------------------------*/
365/** Debug function, checks consistency of memory structures.
366 *
367 * @param[in] arg UHCI structure to use.
368 * @return EOK
369 */
370int uhci_hc_debug_checker(void *arg)
371{
372 uhci_hc_t *instance = (uhci_hc_t*)arg;
373 assert(instance);
374
375#define QH(queue) \
376 instance->transfers_##queue.queue_head
377
378 while (1) {
379 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
380 const uint16_t sts = pio_read_16(&instance->registers->usbsts);
381 const uint16_t intr =
382 pio_read_16(&instance->registers->usbintr);
383
384 if (((cmd & UHCI_CMD_RUN_STOP) != 1) || (sts != 0)) {
385 usb_log_debug2("Command: %X Status: %X Intr: %x\n",
386 cmd, sts, intr);
387 }
388
389 uintptr_t frame_list =
390 pio_read_32(&instance->registers->flbaseadd) & ~0xfff;
391 if (frame_list != addr_to_phys(instance->frame_list)) {
392 usb_log_debug("Framelist address: %p vs. %p.\n",
393 frame_list, addr_to_phys(instance->frame_list));
394 }
395
396 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
397
398 uintptr_t expected_pa = instance->frame_list[frnum]
399 & LINK_POINTER_ADDRESS_MASK;
400 uintptr_t real_pa = addr_to_phys(QH(interrupt));
401 if (expected_pa != real_pa) {
402 usb_log_debug("Interrupt QH: %p(frame: %d) vs. %p.\n",
403 expected_pa, frnum, real_pa);
404 }
405
406 expected_pa = QH(interrupt)->next & LINK_POINTER_ADDRESS_MASK;
407 real_pa = addr_to_phys(QH(control_slow));
408 if (expected_pa != real_pa) {
409 usb_log_debug("Control Slow QH: %p vs. %p.\n",
410 expected_pa, real_pa);
411 }
412
413 expected_pa = QH(control_slow)->next & LINK_POINTER_ADDRESS_MASK;
414 real_pa = addr_to_phys(QH(control_full));
415 if (expected_pa != real_pa) {
416 usb_log_debug("Control Full QH: %p vs. %p.\n",
417 expected_pa, real_pa);
418 }
419
420 expected_pa = QH(control_full)->next & LINK_POINTER_ADDRESS_MASK;
421 real_pa = addr_to_phys(QH(bulk_full));
422 if (expected_pa != real_pa ) {
423 usb_log_debug("Bulk QH: %p vs. %p.\n",
424 expected_pa, real_pa);
425 }
426 async_usleep(UHCI_DEBUGER_TIMEOUT);
427 }
428 return EOK;
429#undef QH
430}
431/*----------------------------------------------------------------------------*/
432/** Checks transfer packets, for USB validity
433 *
434 * @param[in] low_speed Transfer speed.
435 * @param[in] transfer Transer type
436 * @param[in] size Maximum size of used packets
437 * @return EOK
438 */
439bool allowed_usb_packet(
440 bool low_speed, usb_transfer_type_t transfer, size_t size)
441{
442 /* see USB specification chapter 5.5-5.8 for magic numbers used here */
443 switch(transfer)
444 {
445 case USB_TRANSFER_ISOCHRONOUS:
446 return (!low_speed && size < 1024);
447 case USB_TRANSFER_INTERRUPT:
448 return size <= (low_speed ? 8 : 64);
449 case USB_TRANSFER_CONTROL: /* device specifies its own max size */
450 return (size <= (low_speed ? 8 : 64));
451 case USB_TRANSFER_BULK: /* device specifies its own max size */
452 return (!low_speed && size <= 64);
453 }
454 return false;
455}
456/**
457 * @}
458 */
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