source: mainline/uspace/drv/uhci-hcd/uhci.c@ f20f9e2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f20f9e2 was 6495e71, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

Make interrupts compiletime option
  • Property mode set to 100644
File size: 12.1 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup usb
29 * @{
30 */
31/** @file
32 * @brief UHCI driver
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42#include <usb_iface.h>
43
44#include "uhci.h"
45#include "iface.h"
46
47static irq_cmd_t uhci_cmds[] = {
48 {
49 .cmd = CMD_PIO_READ_16,
50 .addr = (void*)0xc022,
51 .dstarg = 1
52 },
53 {
54 .cmd = CMD_PIO_WRITE_16,
55 .addr = (void*)0xc022,
56 .value = 0x1f
57 },
58 {
59 .cmd = CMD_ACCEPT
60 }
61};
62
63
64static int usb_iface_get_address(ddf_fun_t *fun, devman_handle_t handle,
65 usb_address_t *address)
66{
67 assert(fun);
68 uhci_t *hc = fun_to_uhci(fun);
69 assert(hc);
70
71 usb_address_t addr = usb_address_keeping_find(&hc->address_manager,
72 handle);
73 if (addr < 0) {
74 return addr;
75 }
76
77 if (address != NULL) {
78 *address = addr;
79 }
80
81 return EOK;
82}
83/*----------------------------------------------------------------------------*/
84static usb_iface_t hc_usb_iface = {
85 .get_hc_handle = usb_iface_get_hc_handle_hc_impl,
86 .get_address = usb_iface_get_address
87};
88/*----------------------------------------------------------------------------*/
89static ddf_dev_ops_t uhci_ops = {
90 .interfaces[USB_DEV_IFACE] = &hc_usb_iface,
91 .interfaces[USBHC_DEV_IFACE] = &uhci_iface,
92};
93
94static int uhci_init_transfer_lists(uhci_t *instance);
95static int uhci_init_mem_structures(uhci_t *instance);
96static void uhci_init_hw(uhci_t *instance);
97
98static int uhci_interrupt_emulator(void *arg);
99static int uhci_debug_checker(void *arg);
100
101static bool allowed_usb_packet(
102 bool low_speed, usb_transfer_type_t, size_t size);
103
104#define CHECK_RET_RETURN(ret, message...) \
105 if (ret != EOK) { \
106 usb_log_error(message); \
107 return ret; \
108 } else (void) 0
109
110int uhci_init(uhci_t *instance, ddf_dev_t *dev, void *regs, size_t reg_size)
111{
112 assert(reg_size >= sizeof(regs_t));
113 int ret;
114
115 /*
116 * Create UHCI function.
117 */
118 instance->ddf_instance = ddf_fun_create(dev, fun_exposed, "uhci");
119 if (instance->ddf_instance == NULL) {
120 usb_log_error("Failed to create UHCI device function.\n");
121 return ENOMEM;
122 }
123 instance->ddf_instance->ops = &uhci_ops;
124 instance->ddf_instance->driver_data = instance;
125
126 ret = ddf_fun_bind(instance->ddf_instance);
127 CHECK_RET_RETURN(ret, "Failed to bind UHCI device function: %s.\n",
128 str_error(ret));
129
130 /* allow access to hc control registers */
131 regs_t *io;
132 ret = pio_enable(regs, reg_size, (void**)&io);
133 CHECK_RET_RETURN(ret, "Failed to gain access to registers at %p.\n", io);
134 instance->registers = io;
135 usb_log_debug("Device registers accessible.\n");
136
137 ret = uhci_init_mem_structures(instance);
138 CHECK_RET_RETURN(ret, "Failed to initialize memory structures.\n");
139
140 uhci_init_hw(instance);
141
142 instance->cleaner = fibril_create(uhci_interrupt_emulator, instance);
143#ifndef USE_INTERRUTPS
144 fibril_add_ready(instance->cleaner);
145#endif
146
147 instance->debug_checker = fibril_create(uhci_debug_checker, instance);
148 fibril_add_ready(instance->debug_checker);
149
150 return EOK;
151}
152/*----------------------------------------------------------------------------*/
153void uhci_init_hw(uhci_t *instance)
154{
155
156 /* set framelist pointer */
157 const uint32_t pa = addr_to_phys(instance->frame_list);
158 pio_write_32(&instance->registers->flbaseadd, pa);
159
160 /* enable all interrupts, but resume interrupt */
161 pio_write_16(&instance->registers->usbintr,
162 UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
163
164 /* Start the hc with large(64B) packet FSBR */
165 pio_write_16(&instance->registers->usbcmd,
166 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
167 usb_log_debug("Started UHCI HC.\n");
168}
169/*----------------------------------------------------------------------------*/
170int uhci_init_mem_structures(uhci_t *instance)
171{
172 assert(instance);
173
174 /* init interrupt code */
175 irq_cmd_t *interrupt_commands = malloc(sizeof(uhci_cmds));
176 if (interrupt_commands == NULL) {
177 return ENOMEM;
178 }
179 memcpy(interrupt_commands, uhci_cmds, sizeof(uhci_cmds));
180 interrupt_commands[0].addr = (void*)&instance->registers->usbsts;
181 interrupt_commands[1].addr = (void*)&instance->registers->usbsts;
182 instance->interrupt_code.cmds = interrupt_commands;
183 instance->interrupt_code.cmdcount =
184 sizeof(uhci_cmds) / sizeof(irq_cmd_t);
185
186 /* init transfer lists */
187 int ret = uhci_init_transfer_lists(instance);
188 CHECK_RET_RETURN(ret, "Failed to initialize transfer lists.\n");
189 usb_log_debug("Initialized transfer lists.\n");
190
191 /* frame list initialization */
192 instance->frame_list = get_page();
193 ret = instance ? EOK : ENOMEM;
194 CHECK_RET_RETURN(ret, "Failed to get frame list page.\n");
195 usb_log_debug("Initialized frame list.\n");
196
197 /* initialize all frames to point to the first queue head */
198 const uint32_t queue =
199 instance->transfers_interrupt.queue_head_pa
200 | LINK_POINTER_QUEUE_HEAD_FLAG;
201 unsigned i = 0;
202 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
203 instance->frame_list[i] = queue;
204 }
205
206 /* init address keeper(libusb) */
207 usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX);
208 usb_log_debug("Initialized address manager.\n");
209
210 return EOK;
211}
212/*----------------------------------------------------------------------------*/
213int uhci_init_transfer_lists(uhci_t *instance)
214{
215 assert(instance);
216
217 /* initialize TODO: check errors */
218 int ret;
219 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
220 assert(ret == EOK);
221 ret = transfer_list_init(&instance->transfers_control_full, "CONTROL_FULL");
222 assert(ret == EOK);
223 ret = transfer_list_init(&instance->transfers_control_slow, "CONTROL_SLOW");
224 assert(ret == EOK);
225 ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
226 assert(ret == EOK);
227
228 transfer_list_set_next(&instance->transfers_control_full,
229 &instance->transfers_bulk_full);
230 transfer_list_set_next(&instance->transfers_control_slow,
231 &instance->transfers_control_full);
232 transfer_list_set_next(&instance->transfers_interrupt,
233 &instance->transfers_control_slow);
234
235 /*FSBR*/
236#ifdef FSBR
237 transfer_list_set_next(&instance->transfers_bulk_full,
238 &instance->transfers_control_full);
239#endif
240
241 instance->transfers[0][USB_TRANSFER_INTERRUPT] =
242 &instance->transfers_interrupt;
243 instance->transfers[1][USB_TRANSFER_INTERRUPT] =
244 &instance->transfers_interrupt;
245 instance->transfers[0][USB_TRANSFER_CONTROL] =
246 &instance->transfers_control_full;
247 instance->transfers[1][USB_TRANSFER_CONTROL] =
248 &instance->transfers_control_slow;
249 instance->transfers[0][USB_TRANSFER_BULK] =
250 &instance->transfers_bulk_full;
251
252 return EOK;
253}
254/*----------------------------------------------------------------------------*/
255int uhci_schedule(uhci_t *instance, batch_t *batch)
256{
257 assert(instance);
258 assert(batch);
259 const int low_speed = (batch->speed == LOW_SPEED);
260 if (!allowed_usb_packet(
261 low_speed, batch->transfer_type, batch->max_packet_size)) {
262 usb_log_warning("Invalid USB packet specified %s SPEED %d %zu.\n",
263 low_speed ? "LOW" : "FULL" , batch->transfer_type,
264 batch->max_packet_size);
265 return ENOTSUP;
266 }
267 /* TODO: check available bandwith here */
268
269 transfer_list_t *list =
270 instance->transfers[low_speed][batch->transfer_type];
271 assert(list);
272 transfer_list_add_batch(list, batch);
273
274 return EOK;
275}
276/*----------------------------------------------------------------------------*/
277void uhci_interrupt(uhci_t *instance, uint16_t status)
278{
279 assert(instance);
280 if ((status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) == 0)
281 return;
282 usb_log_debug("UHCI interrupt: %X.\n", status);
283 transfer_list_check(&instance->transfers_interrupt);
284 transfer_list_check(&instance->transfers_control_slow);
285 transfer_list_check(&instance->transfers_control_full);
286 transfer_list_check(&instance->transfers_bulk_full);
287}
288/*----------------------------------------------------------------------------*/
289int uhci_interrupt_emulator(void* arg)
290{
291 usb_log_debug("Started interrupt emulator.\n");
292 uhci_t *instance = (uhci_t*)arg;
293 assert(instance);
294
295 while(1) {
296 uint16_t status = pio_read_16(&instance->registers->usbsts);
297 uhci_interrupt(instance, status);
298 pio_write_16(&instance->registers->usbsts, 0x1f);
299 async_usleep(UHCI_CLEANER_TIMEOUT);
300 }
301 return EOK;
302}
303/*---------------------------------------------------------------------------*/
304int uhci_debug_checker(void *arg)
305{
306 uhci_t *instance = (uhci_t*)arg;
307 assert(instance);
308 while (1) {
309 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
310 const uint16_t sts = pio_read_16(&instance->registers->usbsts);
311 const uint16_t intr = pio_read_16(&instance->registers->usbintr);
312 usb_log_debug("Command: %X Status: %X Interrupts: %x\n",
313 cmd, sts, intr);
314
315 uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd);
316 if (frame_list != addr_to_phys(instance->frame_list)) {
317 usb_log_debug("Framelist address: %p vs. %p.\n",
318 frame_list, addr_to_phys(instance->frame_list));
319 }
320 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
321 usb_log_debug2("Framelist item: %d \n", frnum );
322
323 queue_head_t* qh = instance->transfers_interrupt.queue_head;
324
325 if ((instance->frame_list[frnum] & (~0xf)) != (uintptr_t)addr_to_phys(qh)) {
326 usb_log_debug("Interrupt QH: %p vs. %p.\n",
327 instance->frame_list[frnum] & (~0xf), addr_to_phys(qh));
328 }
329
330 if ((qh->next_queue & (~0xf))
331 != (uintptr_t)addr_to_phys(instance->transfers_control_slow.queue_head)) {
332 usb_log_debug("Control Slow QH: %p vs. %p.\n", qh->next_queue & (~0xf),
333 addr_to_phys(instance->transfers_control_slow.queue_head));
334 }
335 qh = instance->transfers_control_slow.queue_head;
336
337 if ((qh->next_queue & (~0xf))
338 != (uintptr_t)addr_to_phys(instance->transfers_control_full.queue_head)) {
339 usb_log_debug("Control Full QH: %p vs. %p.\n", qh->next_queue & (~0xf),
340 addr_to_phys(instance->transfers_control_full.queue_head));\
341 }
342 qh = instance->transfers_control_full.queue_head;
343
344 if ((qh->next_queue & (~0xf))
345 != (uintptr_t)addr_to_phys(instance->transfers_bulk_full.queue_head)) {
346 usb_log_debug("Bulk QH: %p vs. %p.\n", qh->next_queue & (~0xf),
347 addr_to_phys(instance->transfers_bulk_full.queue_head));
348 }
349/*
350 uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
351 cmd |= UHCI_CMD_RUN_STOP;
352 pio_write_16(&instance->registers->usbcmd, cmd);
353*/
354 async_usleep(UHCI_DEBUGER_TIMEOUT);
355 }
356 return 0;
357}
358/*----------------------------------------------------------------------------*/
359bool allowed_usb_packet(
360 bool low_speed, usb_transfer_type_t transfer, size_t size)
361{
362 /* see USB specification chapter 5.5-5.8 for magic numbers used here */
363 switch(transfer) {
364 case USB_TRANSFER_ISOCHRONOUS:
365 return (!low_speed && size < 1024);
366 case USB_TRANSFER_INTERRUPT:
367 return size <= (low_speed ? 8 : 64);
368 case USB_TRANSFER_CONTROL: /* device specifies its own max size */
369 return (size <= (low_speed ? 8 : 64));
370 case USB_TRANSFER_BULK: /* device specifies its own max size */
371 return (!low_speed && size <= 64);
372 }
373 return false;
374}
375/**
376 * @}
377 */
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