source: mainline/uspace/drv/uhci-hcd/uhci.c@ eb292a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since eb292a0 was eb292a0, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

Reset whole hc during initialization

Increase debug level of hw interrupt messages
use better error values for transfer_descriptor
  • Property mode set to 100644
File size: 12.7 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup usb
29 * @{
30 */
31/** @file
32 * @brief UHCI driver
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42#include <usb_iface.h>
43
44#include "uhci.h"
45#include "iface.h"
46
47static irq_cmd_t uhci_cmds[] = {
48 {
49 .cmd = CMD_PIO_READ_16,
50 .addr = (void*)0xc022,
51 .dstarg = 1
52 },
53 {
54 .cmd = CMD_PIO_WRITE_16,
55 .addr = (void*)0xc022,
56 .value = 0x1f
57 },
58 {
59 .cmd = CMD_ACCEPT
60 }
61};
62
63
64static int usb_iface_get_address(ddf_fun_t *fun, devman_handle_t handle,
65 usb_address_t *address)
66{
67 assert(fun);
68 uhci_t *hc = fun_to_uhci(fun);
69 assert(hc);
70
71// usb_address_t addr = usb_address_keeping_find(&hc->address_manager,
72// handle);
73 usb_address_t addr = device_keeper_find(&hc->device_manager,
74 handle);
75 if (addr < 0) {
76 return addr;
77 }
78
79 if (address != NULL) {
80 *address = addr;
81 }
82
83 return EOK;
84}
85/*----------------------------------------------------------------------------*/
86static usb_iface_t hc_usb_iface = {
87 .get_hc_handle = usb_iface_get_hc_handle_hc_impl,
88 .get_address = usb_iface_get_address
89};
90/*----------------------------------------------------------------------------*/
91static ddf_dev_ops_t uhci_ops = {
92 .interfaces[USB_DEV_IFACE] = &hc_usb_iface,
93 .interfaces[USBHC_DEV_IFACE] = &uhci_iface,
94};
95
96static int uhci_init_transfer_lists(uhci_t *instance);
97static int uhci_init_mem_structures(uhci_t *instance);
98static void uhci_init_hw(uhci_t *instance);
99
100static int uhci_interrupt_emulator(void *arg);
101static int uhci_debug_checker(void *arg);
102
103static bool allowed_usb_packet(
104 bool low_speed, usb_transfer_type_t, size_t size);
105
106#define CHECK_RET_RETURN(ret, message...) \
107 if (ret != EOK) { \
108 usb_log_error(message); \
109 return ret; \
110 } else (void) 0
111
112int uhci_init(uhci_t *instance, ddf_dev_t *dev, void *regs, size_t reg_size)
113{
114 assert(reg_size >= sizeof(regs_t));
115 int ret;
116
117 /*
118 * Create UHCI function.
119 */
120 instance->ddf_instance = ddf_fun_create(dev, fun_exposed, "uhci");
121 if (instance->ddf_instance == NULL) {
122 usb_log_error("Failed to create UHCI device function.\n");
123 return ENOMEM;
124 }
125 instance->ddf_instance->ops = &uhci_ops;
126 instance->ddf_instance->driver_data = instance;
127
128 ret = ddf_fun_bind(instance->ddf_instance);
129 CHECK_RET_RETURN(ret, "Failed to bind UHCI device function: %s.\n",
130 str_error(ret));
131
132 /* allow access to hc control registers */
133 regs_t *io;
134 ret = pio_enable(regs, reg_size, (void**)&io);
135 CHECK_RET_RETURN(ret, "Failed to gain access to registers at %p.\n", io);
136 instance->registers = io;
137 usb_log_debug("Device registers accessible.\n");
138
139 ret = uhci_init_mem_structures(instance);
140 CHECK_RET_RETURN(ret, "Failed to initialize memory structures.\n");
141
142 uhci_init_hw(instance);
143
144 instance->cleaner = fibril_create(uhci_interrupt_emulator, instance);
145// fibril_add_ready(instance->cleaner);
146
147 instance->debug_checker = fibril_create(uhci_debug_checker, instance);
148 fibril_add_ready(instance->debug_checker);
149
150 return EOK;
151}
152/*----------------------------------------------------------------------------*/
153void uhci_init_hw(uhci_t *instance)
154{
155 /* reset everything, who knows what touched it before us */
156 pio_write_16(&instance->registers->usbcmd, UHCI_CMD_GLOBAL_RESET);
157 async_usleep(10000); /* 10ms according to USB spec */
158 pio_write_16(&instance->registers->usbcmd, 0);
159
160 /* reset hc, all states and counters */
161 pio_write_16(&instance->registers->usbcmd, UHCI_CMD_HCRESET);
162 while ((pio_read_16(&instance->registers->usbcmd) & UHCI_CMD_HCRESET) != 0)
163 { async_usleep(10); }
164
165 /* set framelist pointer */
166 const uint32_t pa = addr_to_phys(instance->frame_list);
167 pio_write_32(&instance->registers->flbaseadd, pa);
168
169 /* enable all interrupts, but resume interrupt */
170 pio_write_16(&instance->registers->usbintr,
171 UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
172
173 /* Start the hc with large(64B) packet FSBR */
174 pio_write_16(&instance->registers->usbcmd,
175 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
176 usb_log_debug("Started UHCI HC.\n");
177}
178/*----------------------------------------------------------------------------*/
179int uhci_init_mem_structures(uhci_t *instance)
180{
181 assert(instance);
182
183 /* init interrupt code */
184 irq_cmd_t *interrupt_commands = malloc(sizeof(uhci_cmds));
185 if (interrupt_commands == NULL) {
186 return ENOMEM;
187 }
188 memcpy(interrupt_commands, uhci_cmds, sizeof(uhci_cmds));
189 interrupt_commands[0].addr = (void*)&instance->registers->usbsts;
190 interrupt_commands[1].addr = (void*)&instance->registers->usbsts;
191 instance->interrupt_code.cmds = interrupt_commands;
192 instance->interrupt_code.cmdcount =
193 sizeof(uhci_cmds) / sizeof(irq_cmd_t);
194
195 /* init transfer lists */
196 int ret = uhci_init_transfer_lists(instance);
197 CHECK_RET_RETURN(ret, "Failed to initialize transfer lists.\n");
198 usb_log_debug("Initialized transfer lists.\n");
199
200 /* frame list initialization */
201 instance->frame_list = get_page();
202 ret = instance ? EOK : ENOMEM;
203 CHECK_RET_RETURN(ret, "Failed to get frame list page.\n");
204 usb_log_debug("Initialized frame list.\n");
205
206 /* initialize all frames to point to the first queue head */
207 const uint32_t queue =
208 instance->transfers_interrupt.queue_head_pa
209 | LINK_POINTER_QUEUE_HEAD_FLAG;
210 unsigned i = 0;
211 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
212 instance->frame_list[i] = queue;
213 }
214
215 /* init address keeper(libusb) */
216 device_keeper_init(&instance->device_manager);
217 usb_log_debug("Initialized device manager.\n");
218
219 return EOK;
220}
221/*----------------------------------------------------------------------------*/
222int uhci_init_transfer_lists(uhci_t *instance)
223{
224 assert(instance);
225
226 /* initialize TODO: check errors */
227 int ret;
228 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
229 assert(ret == EOK);
230 ret = transfer_list_init(&instance->transfers_control_full, "CONTROL_FULL");
231 assert(ret == EOK);
232 ret = transfer_list_init(&instance->transfers_control_slow, "CONTROL_SLOW");
233 assert(ret == EOK);
234 ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
235 assert(ret == EOK);
236
237 transfer_list_set_next(&instance->transfers_control_full,
238 &instance->transfers_bulk_full);
239 transfer_list_set_next(&instance->transfers_control_slow,
240 &instance->transfers_control_full);
241 transfer_list_set_next(&instance->transfers_interrupt,
242 &instance->transfers_control_slow);
243
244 /*FSBR*/
245#ifdef FSBR
246 transfer_list_set_next(&instance->transfers_bulk_full,
247 &instance->transfers_control_full);
248#endif
249
250 instance->transfers[0][USB_TRANSFER_INTERRUPT] =
251 &instance->transfers_interrupt;
252 instance->transfers[1][USB_TRANSFER_INTERRUPT] =
253 &instance->transfers_interrupt;
254 instance->transfers[0][USB_TRANSFER_CONTROL] =
255 &instance->transfers_control_full;
256 instance->transfers[1][USB_TRANSFER_CONTROL] =
257 &instance->transfers_control_slow;
258 instance->transfers[0][USB_TRANSFER_BULK] =
259 &instance->transfers_bulk_full;
260
261 return EOK;
262}
263/*----------------------------------------------------------------------------*/
264int uhci_schedule(uhci_t *instance, batch_t *batch)
265{
266 assert(instance);
267 assert(batch);
268 const int low_speed = (batch->speed == USB_SPEED_LOW);
269 if (!allowed_usb_packet(
270 low_speed, batch->transfer_type, batch->max_packet_size)) {
271 usb_log_warning("Invalid USB packet specified %s SPEED %d %zu.\n",
272 low_speed ? "LOW" : "FULL" , batch->transfer_type,
273 batch->max_packet_size);
274 return ENOTSUP;
275 }
276 /* TODO: check available bandwith here */
277
278 transfer_list_t *list =
279 instance->transfers[low_speed][batch->transfer_type];
280 assert(list);
281 transfer_list_add_batch(list, batch);
282
283 return EOK;
284}
285/*----------------------------------------------------------------------------*/
286void uhci_interrupt(uhci_t *instance, uint16_t status)
287{
288 assert(instance);
289 if ((status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) == 0)
290 return;
291 usb_log_debug2("UHCI interrupt: %X.\n", status);
292 transfer_list_remove_finished(&instance->transfers_interrupt);
293 transfer_list_remove_finished(&instance->transfers_control_slow);
294 transfer_list_remove_finished(&instance->transfers_control_full);
295 transfer_list_remove_finished(&instance->transfers_bulk_full);
296}
297/*----------------------------------------------------------------------------*/
298int uhci_interrupt_emulator(void* arg)
299{
300 usb_log_debug("Started interrupt emulator.\n");
301 uhci_t *instance = (uhci_t*)arg;
302 assert(instance);
303
304 while (1) {
305 uint16_t status = pio_read_16(&instance->registers->usbsts);
306 usb_log_debug2("UHCI status: %x.\n", status);
307 status |= 1;
308 uhci_interrupt(instance, status);
309 pio_write_16(&instance->registers->usbsts, 0x1f);
310 async_usleep(UHCI_CLEANER_TIMEOUT * 5);
311 }
312 return EOK;
313}
314/*---------------------------------------------------------------------------*/
315int uhci_debug_checker(void *arg)
316{
317 uhci_t *instance = (uhci_t*)arg;
318 assert(instance);
319 while (1) {
320 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
321 const uint16_t sts = pio_read_16(&instance->registers->usbsts);
322 const uint16_t intr = pio_read_16(&instance->registers->usbintr);
323 usb_log_debug("Command: %X Status: %X Interrupts: %x\n",
324 cmd, sts, intr);
325
326 uintptr_t frame_list =
327 pio_read_32(&instance->registers->flbaseadd) & ~0xfff;
328 if (frame_list != addr_to_phys(instance->frame_list)) {
329 usb_log_debug("Framelist address: %p vs. %p.\n",
330 frame_list, addr_to_phys(instance->frame_list));
331 }
332 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
333 usb_log_debug2("Framelist item: %d \n", frnum );
334
335 queue_head_t* qh = instance->transfers_interrupt.queue_head;
336
337 if ((instance->frame_list[frnum] & (~0xf)) != (uintptr_t)addr_to_phys(qh)) {
338 usb_log_debug("Interrupt QH: %p vs. %p.\n",
339 instance->frame_list[frnum] & (~0xf), addr_to_phys(qh));
340 }
341
342 if ((qh->next_queue & (~0xf))
343 != (uintptr_t)addr_to_phys(instance->transfers_control_slow.queue_head)) {
344 usb_log_debug("Control Slow QH: %p vs. %p.\n", qh->next_queue & (~0xf),
345 addr_to_phys(instance->transfers_control_slow.queue_head));
346 }
347 qh = instance->transfers_control_slow.queue_head;
348
349 if ((qh->next_queue & (~0xf))
350 != (uintptr_t)addr_to_phys(instance->transfers_control_full.queue_head)) {
351 usb_log_debug("Control Full QH: %p vs. %p.\n", qh->next_queue & (~0xf),
352 addr_to_phys(instance->transfers_control_full.queue_head));\
353 }
354 qh = instance->transfers_control_full.queue_head;
355
356 if ((qh->next_queue & (~0xf))
357 != (uintptr_t)addr_to_phys(instance->transfers_bulk_full.queue_head)) {
358 usb_log_debug("Bulk QH: %p vs. %p.\n", qh->next_queue & (~0xf),
359 addr_to_phys(instance->transfers_bulk_full.queue_head));
360 }
361/*
362 uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
363 cmd |= UHCI_CMD_RUN_STOP;
364 pio_write_16(&instance->registers->usbcmd, cmd);
365*/
366 async_usleep(UHCI_DEBUGER_TIMEOUT);
367 }
368 return 0;
369}
370/*----------------------------------------------------------------------------*/
371bool allowed_usb_packet(
372 bool low_speed, usb_transfer_type_t transfer, size_t size)
373{
374 /* see USB specification chapter 5.5-5.8 for magic numbers used here */
375 switch(transfer) {
376 case USB_TRANSFER_ISOCHRONOUS:
377 return (!low_speed && size < 1024);
378 case USB_TRANSFER_INTERRUPT:
379 return size <= (low_speed ? 8 : 64);
380 case USB_TRANSFER_CONTROL: /* device specifies its own max size */
381 return (size <= (low_speed ? 8 : 64));
382 case USB_TRANSFER_BULK: /* device specifies its own max size */
383 return (!low_speed && size <= 64);
384 }
385 return false;
386}
387/**
388 * @}
389 */
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