1 | /*
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2 | * Copyright (c) 2011 Jan Vesely
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 | /** @addtogroup usb
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29 | * @{
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30 | */
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31 | /** @file
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32 | * @brief UHCI driver
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33 | */
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34 | #include <errno.h>
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35 | #include <str_error.h>
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36 | #include <adt/list.h>
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37 | #include <libarch/ddi.h>
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38 |
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39 | #include <usb/debug.h>
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40 | #include <usb/usb.h>
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41 | #include <usb/ddfiface.h>
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42 | #include <usb_iface.h>
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43 |
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44 | #include "uhci.h"
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45 | #include "iface.h"
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46 |
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47 | static irq_cmd_t uhci_cmds[] = {
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48 | {
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49 | .cmd = CMD_PIO_READ_16,
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50 | .addr = (void*)0xc022,
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51 | .dstarg = 1
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52 | },
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53 | {
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54 | .cmd = CMD_PIO_WRITE_16,
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55 | .addr = (void*)0xc022,
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56 | .value = 0x1f
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57 | },
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58 | {
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59 | .cmd = CMD_ACCEPT
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60 | }
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61 | };
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62 |
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63 | static int usb_iface_get_address(ddf_fun_t *fun, devman_handle_t handle,
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64 | usb_address_t *address)
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65 | {
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66 | assert(fun);
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67 | uhci_t *hc = fun_to_uhci(fun);
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68 | assert(hc);
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69 |
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70 | usb_address_t addr = usb_address_keeping_find(&hc->address_manager,
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71 | handle);
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72 | if (addr < 0) {
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73 | return addr;
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74 | }
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75 |
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76 | if (address != NULL) {
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77 | *address = addr;
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78 | }
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79 |
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80 | return EOK;
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81 | }
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82 |
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83 |
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84 | static usb_iface_t hc_usb_iface = {
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85 | .get_hc_handle = usb_iface_get_hc_handle_hc_impl,
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86 | .get_address = usb_iface_get_address
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87 | };
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88 | /*----------------------------------------------------------------------------*/
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89 | static ddf_dev_ops_t uhci_ops = {
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90 | .interfaces[USB_DEV_IFACE] = &hc_usb_iface,
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91 | .interfaces[USBHC_DEV_IFACE] = &uhci_iface
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92 | };
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93 |
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94 | static int uhci_init_transfer_lists(uhci_t *instance);
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95 | static int uhci_init_mem_structures(uhci_t *instance);
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96 | static void uhci_init_hw(uhci_t *instance);
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97 |
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98 | static int uhci_interrupt_emulator(void *arg);
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99 | static int uhci_debug_checker(void *arg);
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100 |
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101 | static bool allowed_usb_packet(
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102 | bool low_speed, usb_transfer_type_t, size_t size);
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103 |
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104 | #define CHECK_RET_RETURN(ret, message...) \
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105 | if (ret != EOK) { \
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106 | usb_log_error(message); \
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107 | return ret; \
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108 | } else (void) 0
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109 |
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110 | int uhci_init(uhci_t *instance, ddf_dev_t *dev, void *regs, size_t reg_size)
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111 | {
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112 | assert(reg_size >= sizeof(regs_t));
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113 | int ret;
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114 |
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115 | /*
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116 | * Create UHCI function.
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117 | */
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118 | instance->ddf_instance = ddf_fun_create(dev, fun_exposed, "uhci");
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119 | if (instance->ddf_instance == NULL) {
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120 | usb_log_error("Failed to create UHCI device function.\n");
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121 | return ENOMEM;
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122 | }
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123 | instance->ddf_instance->ops = &uhci_ops;
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124 | instance->ddf_instance->driver_data = instance;
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125 |
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126 | ret = ddf_fun_bind(instance->ddf_instance);
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127 | CHECK_RET_RETURN(ret, "Failed to bind UHCI device function: %s.\n",
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128 | str_error(ret));
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129 |
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130 | /* allow access to hc control registers */
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131 | regs_t *io;
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132 | ret = pio_enable(regs, reg_size, (void**)&io);
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133 | CHECK_RET_RETURN(ret, "Failed to gain access to registers at %p.\n", io);
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134 | instance->registers = io;
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135 | usb_log_debug("Device registers accessible.\n");
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136 |
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137 | ret = uhci_init_mem_structures(instance);
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138 | CHECK_RET_RETURN(ret, "Failed to initialize memory structures.\n");
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139 |
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140 | uhci_init_hw(instance);
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141 |
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142 | instance->cleaner = fibril_create(uhci_interrupt_emulator, instance);
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143 | // fibril_add_ready(instance->cleaner);
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144 |
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145 | instance->debug_checker = fibril_create(uhci_debug_checker, instance);
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146 | fibril_add_ready(instance->debug_checker);
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147 |
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148 | return EOK;
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149 | }
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150 | /*----------------------------------------------------------------------------*/
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151 | void uhci_init_hw(uhci_t *instance)
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152 | {
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153 |
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154 | /* set framelist pointer */
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155 | const uint32_t pa = addr_to_phys(instance->frame_list);
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156 | pio_write_32(&instance->registers->flbaseadd, pa);
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157 |
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158 | /* enable all interrupts, but resume interrupt */
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159 | pio_write_16(&instance->registers->usbintr,
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160 | UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
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161 |
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162 | /* Start the hc with large(64B) packet FSBR */
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163 | pio_write_16(&instance->registers->usbcmd,
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164 | UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
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165 | usb_log_debug("Started UHCI HC.\n");
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166 | }
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167 | /*----------------------------------------------------------------------------*/
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168 | int uhci_init_mem_structures(uhci_t *instance)
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169 | {
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170 | assert(instance);
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171 |
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172 | /* init interrupt code */
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173 | irq_cmd_t *interrupt_commands = malloc(sizeof(uhci_cmds));
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174 | if (interrupt_commands == NULL) {
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175 | return ENOMEM;
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176 | }
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177 | memcpy(interrupt_commands, uhci_cmds, sizeof(uhci_cmds));
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178 | interrupt_commands[0].addr = (void*)&instance->registers->usbsts;
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179 | interrupt_commands[1].addr = (void*)&instance->registers->usbsts;
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180 | instance->interrupt_code.cmds = interrupt_commands;
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181 | instance->interrupt_code.cmdcount =
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182 | sizeof(uhci_cmds) / sizeof(irq_cmd_t);
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183 |
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184 | /* init transfer lists */
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185 | int ret = uhci_init_transfer_lists(instance);
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186 | CHECK_RET_RETURN(ret, "Failed to initialize transfer lists.\n");
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187 | usb_log_debug("Initialized transfer lists.\n");
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188 |
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189 | /* frame list initialization */
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190 | instance->frame_list = get_page();
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191 | ret = instance ? EOK : ENOMEM;
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192 | CHECK_RET_RETURN(ret, "Failed to get frame list page.\n");
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193 | usb_log_debug("Initialized frame list.\n");
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194 |
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195 | /* initialize all frames to point to the first queue head */
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196 | const uint32_t queue =
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197 | instance->transfers_interrupt.queue_head_pa
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198 | | LINK_POINTER_QUEUE_HEAD_FLAG;
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199 | unsigned i = 0;
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200 | for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
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201 | instance->frame_list[i] = queue;
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202 | }
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203 |
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204 | /* init address keeper(libusb) */
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205 | usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX);
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206 | usb_log_debug("Initialized address manager.\n");
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207 |
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208 | return EOK;
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209 | }
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210 | /*----------------------------------------------------------------------------*/
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211 | int uhci_init_transfer_lists(uhci_t *instance)
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212 | {
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213 | assert(instance);
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214 |
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215 | /* initialize TODO: check errors */
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216 | int ret;
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217 | ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
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218 | assert(ret == EOK);
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219 | ret = transfer_list_init(&instance->transfers_control_full, "CONTROL_FULL");
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220 | assert(ret == EOK);
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221 | ret = transfer_list_init(&instance->transfers_control_slow, "CONTROL_SLOW");
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222 | assert(ret == EOK);
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223 | ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
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224 | assert(ret == EOK);
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225 |
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226 | transfer_list_set_next(&instance->transfers_control_full,
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227 | &instance->transfers_bulk_full);
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228 | transfer_list_set_next(&instance->transfers_control_slow,
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229 | &instance->transfers_control_full);
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230 | transfer_list_set_next(&instance->transfers_interrupt,
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231 | &instance->transfers_control_slow);
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232 |
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233 | /*FSBR*/
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234 | #ifdef FSBR
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235 | transfer_list_set_next(&instance->transfers_bulk_full,
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236 | &instance->transfers_control_full);
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237 | #endif
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238 |
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239 | instance->transfers[0][USB_TRANSFER_INTERRUPT] =
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240 | &instance->transfers_interrupt;
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241 | instance->transfers[1][USB_TRANSFER_INTERRUPT] =
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242 | &instance->transfers_interrupt;
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243 | instance->transfers[0][USB_TRANSFER_CONTROL] =
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244 | &instance->transfers_control_full;
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245 | instance->transfers[1][USB_TRANSFER_CONTROL] =
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246 | &instance->transfers_control_slow;
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247 | instance->transfers[0][USB_TRANSFER_BULK] =
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248 | &instance->transfers_bulk_full;
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249 |
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250 | return EOK;
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251 | }
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252 | /*----------------------------------------------------------------------------*/
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253 | int uhci_schedule(uhci_t *instance, batch_t *batch)
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254 | {
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255 | assert(instance);
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256 | assert(batch);
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257 | const int low_speed = (batch->speed == LOW_SPEED);
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258 | if (!allowed_usb_packet(
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259 | low_speed, batch->transfer_type, batch->max_packet_size)) {
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260 | usb_log_warning("Invalid USB packet specified %s SPEED %d %zu.\n",
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261 | low_speed ? "LOW" : "FULL" , batch->transfer_type,
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262 | batch->max_packet_size);
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263 | return ENOTSUP;
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264 | }
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265 | /* TODO: check available bandwith here */
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266 |
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267 | transfer_list_t *list =
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268 | instance->transfers[low_speed][batch->transfer_type];
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269 | assert(list);
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270 | transfer_list_add_batch(list, batch);
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271 |
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272 | return EOK;
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273 | }
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274 | /*----------------------------------------------------------------------------*/
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275 | void uhci_interrupt(uhci_t *instance, uint16_t status)
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276 | {
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277 | assert(instance);
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278 | if ((status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) == 0)
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279 | return;
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280 | usb_log_debug("UHCI interrupt: %X.\n", status);
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281 | transfer_list_check(&instance->transfers_interrupt);
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282 | transfer_list_check(&instance->transfers_control_slow);
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283 | transfer_list_check(&instance->transfers_control_full);
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284 | transfer_list_check(&instance->transfers_bulk_full);
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285 | }
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286 | /*----------------------------------------------------------------------------*/
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287 | int uhci_interrupt_emulator(void* arg)
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288 | {
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289 | usb_log_debug("Started interrupt emulator.\n");
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290 | uhci_t *instance = (uhci_t*)arg;
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291 | assert(instance);
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292 |
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293 | while(1) {
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294 | uint16_t status = pio_read_16(&instance->registers->usbsts);
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295 | uhci_interrupt(instance, status);
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296 | async_usleep(UHCI_CLEANER_TIMEOUT);
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297 | }
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298 | return EOK;
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299 | }
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300 | /*---------------------------------------------------------------------------*/
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301 | int uhci_debug_checker(void *arg)
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302 | {
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303 | uhci_t *instance = (uhci_t*)arg;
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304 | assert(instance);
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305 | while (1) {
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306 | const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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307 | const uint16_t sts = pio_read_16(&instance->registers->usbsts);
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308 | const uint16_t intr = pio_read_16(&instance->registers->usbintr);
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309 | usb_log_debug("Command: %X Status: %X Interrupts: %x\n",
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310 | cmd, sts, intr);
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311 |
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312 | uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd);
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313 | if (frame_list != addr_to_phys(instance->frame_list)) {
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314 | usb_log_debug("Framelist address: %p vs. %p.\n",
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315 | frame_list, addr_to_phys(instance->frame_list));
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316 | }
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317 | int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
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318 | usb_log_debug2("Framelist item: %d \n", frnum );
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319 |
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320 | queue_head_t* qh = instance->transfers_interrupt.queue_head;
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321 |
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322 | if ((instance->frame_list[frnum] & (~0xf)) != (uintptr_t)addr_to_phys(qh)) {
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323 | usb_log_debug("Interrupt QH: %p vs. %p.\n",
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324 | instance->frame_list[frnum] & (~0xf), addr_to_phys(qh));
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325 | }
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326 |
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327 | if ((qh->next_queue & (~0xf))
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328 | != (uintptr_t)addr_to_phys(instance->transfers_control_slow.queue_head)) {
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329 | usb_log_debug("Control Slow QH: %p vs. %p.\n", qh->next_queue & (~0xf),
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330 | addr_to_phys(instance->transfers_control_slow.queue_head));
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331 | }
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332 | qh = instance->transfers_control_slow.queue_head;
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333 |
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334 | if ((qh->next_queue & (~0xf))
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335 | != (uintptr_t)addr_to_phys(instance->transfers_control_full.queue_head)) {
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336 | usb_log_debug("Control Full QH: %p vs. %p.\n", qh->next_queue & (~0xf),
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337 | addr_to_phys(instance->transfers_control_full.queue_head));\
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338 | }
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339 | qh = instance->transfers_control_full.queue_head;
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340 |
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341 | if ((qh->next_queue & (~0xf))
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342 | != (uintptr_t)addr_to_phys(instance->transfers_bulk_full.queue_head)) {
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343 | usb_log_debug("Bulk QH: %p vs. %p.\n", qh->next_queue & (~0xf),
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344 | addr_to_phys(instance->transfers_bulk_full.queue_head));
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345 | }
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346 | /*
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347 | uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
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348 | cmd |= UHCI_CMD_RUN_STOP;
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349 | pio_write_16(&instance->registers->usbcmd, cmd);
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350 | */
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351 | async_usleep(UHCI_DEBUGER_TIMEOUT);
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352 | }
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353 | return 0;
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354 | }
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355 | /*----------------------------------------------------------------------------*/
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356 | bool allowed_usb_packet(
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357 | bool low_speed, usb_transfer_type_t transfer, size_t size)
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358 | {
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359 | /* see USB specification chapter 5.5-5.8 for magic numbers used here */
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360 | switch(transfer) {
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361 | case USB_TRANSFER_ISOCHRONOUS:
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362 | return (!low_speed && size < 1024);
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363 | case USB_TRANSFER_INTERRUPT:
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364 | return size <= (low_speed ? 8 : 64);
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365 | case USB_TRANSFER_CONTROL: /* device specifies its own max size */
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366 | return (size <= (low_speed ? 8 : 64));
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367 | case USB_TRANSFER_BULK: /* device specifies its own max size */
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368 | return (!low_speed && size <= 64);
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369 | }
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370 | return false;
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371 | }
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372 | /**
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373 | * @}
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374 | */
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