source: mainline/uspace/drv/uhci-hcd/uhci.c@ 357a302

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 357a302 was 83c439c, checked in by Jan Vesely <jano.vesely@…>, 15 years ago

Rename tracker⇒batch
  • Property mode set to 100644
File size: 9.0 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup usb
29 * @{
30 */
31/** @file
32 * @brief UHCI driver
33 */
34#include <errno.h>
35#include <adt/list.h>
36
37#include <usb/debug.h>
38#include <usb/usb.h>
39
40#include "uhci.h"
41
42static int uhci_init_transfer_lists(uhci_t *instance);
43static int uhci_clean_finished(void *arg);
44static int uhci_debug_checker(void *arg);
45static bool allowed_usb_packet(
46 bool low_speed, usb_transfer_type_t, size_t size);
47
48int uhci_init(uhci_t *instance, void *regs, size_t reg_size)
49{
50#define CHECK_RET_RETURN(message...) \
51 if (ret != EOK) { \
52 usb_log_error(message); \
53 return ret; \
54 } else (void) 0
55
56 /* init address keeper(libusb) */
57 usb_address_keeping_init(&instance->address_manager, USB11_ADDRESS_MAX);
58 usb_log_debug("Initialized address manager.\n");
59
60 /* allow access to hc control registers */
61 regs_t *io;
62 assert(reg_size >= sizeof(regs_t));
63 int ret = pio_enable(regs, reg_size, (void**)&io);
64 CHECK_RET_RETURN("Failed to gain access to registers at %p.\n", io);
65 instance->registers = io;
66 usb_log_debug("Device registers accessible.\n");
67
68 /* init transfer lists */
69 ret = uhci_init_transfer_lists(instance);
70 CHECK_RET_RETURN("Failed to initialize transfer lists.\n");
71 usb_log_debug("Transfer lists initialized.\n");
72
73
74 usb_log_debug("Initializing frame list.\n");
75 instance->frame_list = get_page();
76 ret = instance ? EOK : ENOMEM;
77 CHECK_RET_RETURN("Failed to get frame list page.\n");
78
79 /* initialize all frames to point to the first queue head */
80 const uint32_t queue =
81 instance->transfers_interrupt.queue_head_pa
82 | LINK_POINTER_QUEUE_HEAD_FLAG;
83 unsigned i = 0;
84 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
85 instance->frame_list[i] = queue;
86 }
87
88 const uintptr_t pa = (uintptr_t)addr_to_phys(instance->frame_list);
89 pio_write_32(&instance->registers->flbaseadd, (uint32_t)pa);
90
91 list_initialize(&instance->batch_list);
92 fibril_mutex_initialize(&instance->batch_list_mutex);
93
94 instance->cleaner = fibril_create(uhci_clean_finished, instance);
95 fibril_add_ready(instance->cleaner);
96
97 instance->debug_checker = fibril_create(uhci_debug_checker, instance);
98 fibril_add_ready(instance->debug_checker);
99
100 /* Start the hc with large(64B) packet FSBR */
101 pio_write_16(&instance->registers->usbcmd,
102 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET);
103 usb_log_debug("Started UHCI HC.\n");
104
105 uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
106 cmd |= UHCI_CMD_DEBUG;
107 pio_write_16(&instance->registers->usbcmd, cmd);
108
109 return EOK;
110}
111/*----------------------------------------------------------------------------*/
112int uhci_init_transfer_lists(uhci_t *instance)
113{
114 assert(instance);
115
116 /* initialize */
117 int ret;
118 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
119 assert(ret == EOK);
120 ret = transfer_list_init(&instance->transfers_control_full, "CONTROL_FULL");
121 assert(ret == EOK);
122 ret = transfer_list_init(&instance->transfers_control_slow, "CONTROL_SLOW");
123 assert(ret == EOK);
124 ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
125 assert(ret == EOK);
126
127 transfer_list_set_next(&instance->transfers_control_full,
128 &instance->transfers_bulk_full);
129 transfer_list_set_next(&instance->transfers_control_slow,
130 &instance->transfers_control_full);
131 transfer_list_set_next(&instance->transfers_interrupt,
132 &instance->transfers_control_slow);
133
134 /*FSBR*/
135#ifdef FSBR
136 transfer_list_set_next(&instance->transfers_bulk_full,
137 &instance->transfers_control_full);
138#endif
139
140 instance->transfers[0][USB_TRANSFER_INTERRUPT] =
141 &instance->transfers_interrupt;
142 instance->transfers[1][USB_TRANSFER_INTERRUPT] =
143 &instance->transfers_interrupt;
144 instance->transfers[0][USB_TRANSFER_CONTROL] =
145 &instance->transfers_control_full;
146 instance->transfers[1][USB_TRANSFER_CONTROL] =
147 &instance->transfers_control_slow;
148 instance->transfers[0][USB_TRANSFER_CONTROL] =
149 &instance->transfers_control_full;
150
151 return EOK;
152}
153/*----------------------------------------------------------------------------*/
154int uhci_schedule(uhci_t *instance, batch_t *batch)
155{
156 assert(instance);
157 assert(batch);
158 const int low_speed = (batch->speed == LOW_SPEED);
159 if (!allowed_usb_packet(
160 low_speed, batch->transfer_type, batch->max_packet_size)) {
161 usb_log_warning("Invalid USB packet specified %s SPEED %d %zu.\n",
162 low_speed ? "LOW" : "FULL" , batch->transfer_type,
163 batch->max_packet_size);
164 return ENOTSUP;
165 }
166 /* TODO: check available bandwith here */
167
168 transfer_list_t *list =
169 instance->transfers[low_speed][batch->transfer_type];
170 assert(list);
171 transfer_list_add_batch(list, batch);
172
173 return EOK;
174}
175/*----------------------------------------------------------------------------*/
176int uhci_clean_finished(void* arg)
177{
178 usb_log_debug("Started cleaning fibril.\n");
179 uhci_t *instance = (uhci_t*)arg;
180 assert(instance);
181
182 while(1) {
183 transfer_list_check(&instance->transfers_interrupt);
184 transfer_list_check(&instance->transfers_control_slow);
185 transfer_list_check(&instance->transfers_control_full);
186 transfer_list_check(&instance->transfers_bulk_full);
187 async_usleep(UHCI_CLEANER_TIMEOUT);
188 }
189 return EOK;
190}
191/*---------------------------------------------------------------------------*/
192int uhci_debug_checker(void *arg)
193{
194 uhci_t *instance = (uhci_t*)arg;
195 assert(instance);
196 while (1) {
197 uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
198 uint16_t sts = pio_read_16(&instance->registers->usbsts);
199 usb_log_debug("Command register: %X Status register: %X\n", cmd, sts);
200
201 uintptr_t frame_list = pio_read_32(&instance->registers->flbaseadd);
202 if (frame_list != (uintptr_t)addr_to_phys(instance->frame_list)) {
203 usb_log_debug("Framelist address: %p vs. %p.\n",
204 frame_list, addr_to_phys(instance->frame_list));
205 }
206 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
207 usb_log_debug2("Framelist item: %d \n", frnum );
208
209 queue_head_t* qh = instance->transfers_interrupt.queue_head;
210
211 if ((instance->frame_list[frnum] & (~0xf)) != (uintptr_t)addr_to_phys(qh)) {
212 usb_log_debug("Interrupt QH: %p vs. %p.\n",
213 instance->frame_list[frnum] & (~0xf), addr_to_phys(qh));
214 }
215
216 if ((qh->next_queue & (~0xf))
217 != (uintptr_t)addr_to_phys(instance->transfers_control_slow.queue_head)) {
218 usb_log_debug("Control Slow QH: %p vs. %p.\n", qh->next_queue & (~0xf),
219 addr_to_phys(instance->transfers_control_slow.queue_head));
220 }
221 qh = instance->transfers_control_slow.queue_head;
222
223 if ((qh->next_queue & (~0xf))
224 != (uintptr_t)addr_to_phys(instance->transfers_control_full.queue_head)) {
225 usb_log_debug("Control Full QH: %p vs. %p.\n", qh->next_queue & (~0xf),
226 addr_to_phys(instance->transfers_control_full.queue_head));\
227 }
228 qh = instance->transfers_control_full.queue_head;
229
230 if ((qh->next_queue & (~0xf))
231 != (uintptr_t)addr_to_phys(instance->transfers_bulk_full.queue_head)) {
232 usb_log_debug("Bulk QH: %p vs. %p.\n", qh->next_queue & (~0xf),
233 addr_to_phys(instance->transfers_bulk_full.queue_head));
234 }
235/*
236 uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
237 cmd |= UHCI_CMD_RUN_STOP;
238 pio_write_16(&instance->registers->usbcmd, cmd);
239*/
240 async_usleep(UHCI_DEBUGER_TIMEOUT);
241 }
242 return 0;
243}
244/*----------------------------------------------------------------------------*/
245bool allowed_usb_packet(
246 bool low_speed, usb_transfer_type_t transfer, size_t size)
247{
248 /* see USB specification chapter 5.5-5.8 for magic numbers used here */
249 switch(transfer) {
250 case USB_TRANSFER_ISOCHRONOUS:
251 return (!low_speed && size < 1024);
252 case USB_TRANSFER_INTERRUPT:
253 return size <= (low_speed ? 8 : 64);
254 case USB_TRANSFER_CONTROL: /* device specifies its own max size */
255 return (size <= (low_speed ? 8 : 64));
256 case USB_TRANSFER_BULK: /* device specifies its own max size */
257 return (!low_speed && size <= 64);
258 }
259 return false;
260}
261/**
262 * @}
263 */
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