source: mainline/uspace/drv/uhci-hcd/uhci.c@ 57c0a7e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 57c0a7e was 57c0a7e, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

Refactoring

dump setup buffer on TD initialization

  • Property mode set to 100644
File size: 13.7 KB
RevLine 
[c56dbe0]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup usb
29 * @{
30 */
31/** @file
32 * @brief UHCI driver
33 */
[3515533]34#include <errno.h>
[eb1a2f4]35#include <str_error.h>
[3cc5ccda]36#include <adt/list.h>
[eb1a2f4]37#include <libarch/ddi.h>
[afcd86e]38
[3515533]39#include <usb/debug.h>
[18e35a7]40#include <usb/usb.h>
[eb1a2f4]41#include <usb/ddfiface.h>
42#include <usb_iface.h>
[3515533]43
44#include "uhci.h"
[eb1a2f4]45#include "iface.h"
46
[b9d910f]47static irq_cmd_t uhci_cmds[] = {
48 {
49 .cmd = CMD_PIO_READ_16,
[1ae51ae]50 .addr = NULL, /* patched for every instance */
[b9d910f]51 .dstarg = 1
52 },
53 {
54 .cmd = CMD_PIO_WRITE_16,
[1ae51ae]55 .addr = NULL, /* pathed for every instance */
[b9d910f]56 .value = 0x1f
57 },
58 {
59 .cmd = CMD_ACCEPT
60 }
61};
[3515533]62
[eb1a2f4]63static int usb_iface_get_address(ddf_fun_t *fun, devman_handle_t handle,
64 usb_address_t *address)
65{
66 assert(fun);
67 uhci_t *hc = fun_to_uhci(fun);
68 assert(hc);
69
[1a93bb0]70 usb_address_t addr = device_keeper_find(&hc->device_manager,
[eb1a2f4]71 handle);
72 if (addr < 0) {
73 return addr;
74 }
75
76 if (address != NULL) {
77 *address = addr;
78 }
79
80 return EOK;
81}
[6cbe7dad]82/*----------------------------------------------------------------------------*/
[eb1a2f4]83static usb_iface_t hc_usb_iface = {
84 .get_hc_handle = usb_iface_get_hc_handle_hc_impl,
85 .get_address = usb_iface_get_address
86};
87/*----------------------------------------------------------------------------*/
88static ddf_dev_ops_t uhci_ops = {
89 .interfaces[USB_DEV_IFACE] = &hc_usb_iface,
[6cbe7dad]90 .interfaces[USBHC_DEV_IFACE] = &uhci_iface,
[eb1a2f4]91};
[b375bb8]92/*----------------------------------------------------------------------------*/
[881c47b]93static int uhci_init_transfer_lists(uhci_t *instance);
[f4c87aa9]94static int uhci_init_mem_structures(uhci_t *instance);
95static void uhci_init_hw(uhci_t *instance);
96
[30a4301]97static int uhci_interrupt_emulator(void *arg);
[0535ee4]98static int uhci_debug_checker(void *arg);
[f4c87aa9]99
[4d73d71]100static bool allowed_usb_packet(
101 bool low_speed, usb_transfer_type_t, size_t size);
[7977fa1]102
[3515533]103
[eb1a2f4]104int uhci_init(uhci_t *instance, ddf_dev_t *dev, void *regs, size_t reg_size)
[f4c87aa9]105{
[733a9a8]106 assert(reg_size >= sizeof(regs_t));
[eb1a2f4]107 int ret;
108
[4abc304]109#define CHECK_RET_DEST_FUN_RETURN(ret, message...) \
110 if (ret != EOK) { \
111 usb_log_error(message); \
112 if (instance->ddf_instance) \
113 ddf_fun_destroy(instance->ddf_instance); \
114 return ret; \
115 } else (void) 0
116
[b375bb8]117 /* Create UHCI function. */
[eb1a2f4]118 instance->ddf_instance = ddf_fun_create(dev, fun_exposed, "uhci");
[4abc304]119 ret = (instance->ddf_instance == NULL) ? ENOMEM : EOK;
[b375bb8]120 CHECK_RET_DEST_FUN_RETURN(ret,
121 "Failed to create UHCI device function.\n");
[4abc304]122
[eb1a2f4]123 instance->ddf_instance->ops = &uhci_ops;
124 instance->ddf_instance->driver_data = instance;
125
126 ret = ddf_fun_bind(instance->ddf_instance);
[b375bb8]127 CHECK_RET_DEST_FUN_RETURN(ret,
128 "Failed(%d) to bind UHCI device function: %s.\n",
[4abc304]129 ret, str_error(ret));
[18e35a7]130
[3515533]131 /* allow access to hc control registers */
132 regs_t *io;
[eb1a2f4]133 ret = pio_enable(regs, reg_size, (void**)&io);
[b375bb8]134 CHECK_RET_DEST_FUN_RETURN(ret,
135 "Failed(%d) to gain access to registers at %p: %s.\n",
[4abc304]136 ret, str_error(ret), io);
[3515533]137 instance->registers = io;
[b375bb8]138 usb_log_debug("Device registers at %p(%u) accessible.\n",
139 io, reg_size);
[3515533]140
[733a9a8]141 ret = uhci_init_mem_structures(instance);
[b375bb8]142 CHECK_RET_DEST_FUN_RETURN(ret,
143 "Failed to initialize UHCI memory structures.\n");
[733a9a8]144
145 uhci_init_hw(instance);
[b375bb8]146 instance->cleaner =
147 fibril_create(uhci_interrupt_emulator, instance);
[3de48b5]148 fibril_add_ready(instance->cleaner);
[f4c87aa9]149
150 instance->debug_checker = fibril_create(uhci_debug_checker, instance);
151 fibril_add_ready(instance->debug_checker);
152
[4abc304]153 usb_log_info("Started UHCI driver.\n");
[f4c87aa9]154 return EOK;
[4abc304]155#undef CHECK_RET_DEST_FUN_RETURN
[f4c87aa9]156}
157/*----------------------------------------------------------------------------*/
158void uhci_init_hw(uhci_t *instance)
159{
[b375bb8]160 assert(instance);
161
[eb292a0]162 /* reset everything, who knows what touched it before us */
[cabda7f]163 pio_write_16(&instance->registers->usbcmd, UHCI_CMD_GLOBAL_RESET);
164 async_usleep(10000); /* 10ms according to USB spec */
165 pio_write_16(&instance->registers->usbcmd, 0);
[733a9a8]166
[eb292a0]167 /* reset hc, all states and counters */
168 pio_write_16(&instance->registers->usbcmd, UHCI_CMD_HCRESET);
[57c0a7e]169 do { async_usleep(10); }
170 while ((pio_read_16(&instance->registers->usbcmd) & UHCI_CMD_HCRESET) != 0);
[eb292a0]171
[733a9a8]172 /* set framelist pointer */
[36a4738]173 const uint32_t pa = addr_to_phys(instance->frame_list);
174 pio_write_32(&instance->registers->flbaseadd, pa);
175
[733a9a8]176 /* enable all interrupts, but resume interrupt */
[57c0a7e]177// pio_write_16(&instance->registers->usbintr,
178// UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET);
[f4c87aa9]179
[57c0a7e]180 uint16_t status = pio_read_16(&instance->registers->usbcmd);
181 usb_log_warning("Previous command value: %x.\n", status);
[f4c87aa9]182 /* Start the hc with large(64B) packet FSBR */
183 pio_write_16(&instance->registers->usbcmd,
[733a9a8]184 UHCI_CMD_RUN_STOP | UHCI_CMD_MAX_PACKET | UHCI_CMD_CONFIGURE);
[f4c87aa9]185}
186/*----------------------------------------------------------------------------*/
187int uhci_init_mem_structures(uhci_t *instance)
188{
189 assert(instance);
[4abc304]190#define CHECK_RET_DEST_CMDS_RETURN(ret, message...) \
191 if (ret != EOK) { \
192 usb_log_error(message); \
193 if (instance->interrupt_code.cmds != NULL) \
194 free(instance->interrupt_code.cmds); \
195 return ret; \
196 } else (void) 0
[b9d910f]197
198 /* init interrupt code */
[4abc304]199 instance->interrupt_code.cmds = malloc(sizeof(uhci_cmds));
200 int ret = (instance->interrupt_code.cmds == NULL) ? ENOMEM : EOK;
201 CHECK_RET_DEST_CMDS_RETURN(ret, "Failed to allocate interrupt cmds space.\n");
202
203 {
204 irq_cmd_t *interrupt_commands = instance->interrupt_code.cmds;
205 memcpy(interrupt_commands, uhci_cmds, sizeof(uhci_cmds));
206 interrupt_commands[0].addr = (void*)&instance->registers->usbsts;
207 interrupt_commands[1].addr = (void*)&instance->registers->usbsts;
208 instance->interrupt_code.cmdcount =
[b375bb8]209 sizeof(uhci_cmds) / sizeof(irq_cmd_t);
[b9d910f]210 }
211
[9ee87f6]212 /* init transfer lists */
[4abc304]213 ret = uhci_init_transfer_lists(instance);
214 CHECK_RET_DEST_CMDS_RETURN(ret, "Failed to initialize transfer lists.\n");
[acce4fc]215 usb_log_debug("Initialized transfer lists.\n");
[9ee87f6]216
[f4c87aa9]217 /* frame list initialization */
[d1984e0]218 instance->frame_list = get_page();
[1256a0a]219 ret = instance ? EOK : ENOMEM;
[4abc304]220 CHECK_RET_DEST_CMDS_RETURN(ret, "Failed to get frame list page.\n");
[acce4fc]221 usb_log_debug("Initialized frame list.\n");
[9600516]222
[9ee87f6]223 /* initialize all frames to point to the first queue head */
224 const uint32_t queue =
[881c47b]225 instance->transfers_interrupt.queue_head_pa
[9ee87f6]226 | LINK_POINTER_QUEUE_HEAD_FLAG;
[4abc304]227
[5944244]228 unsigned i = 0;
[9ee87f6]229 for(; i < UHCI_FRAME_LIST_COUNT; ++i) {
230 instance->frame_list[i] = queue;
231 }
232
[f4c87aa9]233 /* init address keeper(libusb) */
[1a93bb0]234 device_keeper_init(&instance->device_manager);
235 usb_log_debug("Initialized device manager.\n");
[881c47b]236
[3515533]237 return EOK;
[4abc304]238#undef CHECK_RET_DEST_CMDS_RETURN
[3515533]239}
240/*----------------------------------------------------------------------------*/
[881c47b]241int uhci_init_transfer_lists(uhci_t *instance)
[643b983]242{
[881c47b]243 assert(instance);
[4abc304]244#define CHECK_RET_CLEAR_RETURN(ret, message...) \
245 if (ret != EOK) { \
246 usb_log_error(message); \
247 transfer_list_fini(&instance->transfers_bulk_full); \
248 transfer_list_fini(&instance->transfers_control_full); \
249 transfer_list_fini(&instance->transfers_control_slow); \
250 transfer_list_fini(&instance->transfers_interrupt); \
251 return ret; \
252 } else (void) 0
[b00163f]253
[f4c87aa9]254 /* initialize TODO: check errors */
[643b983]255 int ret;
[881c47b]256 ret = transfer_list_init(&instance->transfers_bulk_full, "BULK_FULL");
[4abc304]257 CHECK_RET_CLEAR_RETURN(ret, "Failed to init BULK list.");
[b375bb8]258
[881c47b]259 ret = transfer_list_init(&instance->transfers_control_full, "CONTROL_FULL");
[4abc304]260 CHECK_RET_CLEAR_RETURN(ret, "Failed to init CONTROL FULL list.");
[b375bb8]261
[881c47b]262 ret = transfer_list_init(&instance->transfers_control_slow, "CONTROL_SLOW");
[4abc304]263 CHECK_RET_CLEAR_RETURN(ret, "Failed to init CONTROL SLOW list.");
[b375bb8]264
[881c47b]265 ret = transfer_list_init(&instance->transfers_interrupt, "INTERRUPT");
[4abc304]266 CHECK_RET_CLEAR_RETURN(ret, "Failed to init INTERRUPT list.");
[881c47b]267
268 transfer_list_set_next(&instance->transfers_control_full,
269 &instance->transfers_bulk_full);
270 transfer_list_set_next(&instance->transfers_control_slow,
271 &instance->transfers_control_full);
272 transfer_list_set_next(&instance->transfers_interrupt,
273 &instance->transfers_control_slow);
274
275 /*FSBR*/
276#ifdef FSBR
277 transfer_list_set_next(&instance->transfers_bulk_full,
278 &instance->transfers_control_full);
279#endif
280
281 instance->transfers[0][USB_TRANSFER_INTERRUPT] =
282 &instance->transfers_interrupt;
283 instance->transfers[1][USB_TRANSFER_INTERRUPT] =
284 &instance->transfers_interrupt;
285 instance->transfers[0][USB_TRANSFER_CONTROL] =
286 &instance->transfers_control_full;
287 instance->transfers[1][USB_TRANSFER_CONTROL] =
288 &instance->transfers_control_slow;
[f4c87aa9]289 instance->transfers[0][USB_TRANSFER_BULK] =
290 &instance->transfers_bulk_full;
[643b983]291
292 return EOK;
[4abc304]293#undef CHECK_RET_CLEAR_RETURN
[643b983]294}
[b00163f]295/*----------------------------------------------------------------------------*/
[83c439c]296int uhci_schedule(uhci_t *instance, batch_t *batch)
[9a818a9]297{
298 assert(instance);
[83c439c]299 assert(batch);
[1a93bb0]300 const int low_speed = (batch->speed == USB_SPEED_LOW);
[9a818a9]301 if (!allowed_usb_packet(
[83c439c]302 low_speed, batch->transfer_type, batch->max_packet_size)) {
[9a818a9]303 usb_log_warning("Invalid USB packet specified %s SPEED %d %zu.\n",
[b375bb8]304 low_speed ? "LOW" : "FULL" , batch->transfer_type,
[83c439c]305 batch->max_packet_size);
[9a818a9]306 return ENOTSUP;
307 }
308 /* TODO: check available bandwith here */
309
310 transfer_list_t *list =
[83c439c]311 instance->transfers[low_speed][batch->transfer_type];
[9a818a9]312 assert(list);
[83c439c]313 transfer_list_add_batch(list, batch);
[3cc5ccda]314
[9a818a9]315 return EOK;
316}
317/*----------------------------------------------------------------------------*/
[733a9a8]318void uhci_interrupt(uhci_t *instance, uint16_t status)
[9ee87f6]319{
[30a4301]320 assert(instance);
[86c2ccd]321 transfer_list_remove_finished(&instance->transfers_interrupt);
322 transfer_list_remove_finished(&instance->transfers_control_slow);
323 transfer_list_remove_finished(&instance->transfers_control_full);
324 transfer_list_remove_finished(&instance->transfers_bulk_full);
[30a4301]325}
326/*----------------------------------------------------------------------------*/
327int uhci_interrupt_emulator(void* arg)
328{
329 usb_log_debug("Started interrupt emulator.\n");
[9ee87f6]330 uhci_t *instance = (uhci_t*)arg;
331 assert(instance);
[579dec2]332
[86c2ccd]333 while (1) {
[733a9a8]334 uint16_t status = pio_read_16(&instance->registers->usbsts);
[48563a3]335 if (status != 0)
336 usb_log_debug2("UHCI status: %x.\n", status);
[cabda7f]337 status |= 1;
[733a9a8]338 uhci_interrupt(instance, status);
[6495e71]339 pio_write_16(&instance->registers->usbsts, 0x1f);
[3c775adb]340 async_usleep(UHCI_CLEANER_TIMEOUT);
[9ee87f6]341 }
342 return EOK;
343}
[0535ee4]344/*---------------------------------------------------------------------------*/
345int uhci_debug_checker(void *arg)
346{
347 uhci_t *instance = (uhci_t*)arg;
348 assert(instance);
[b375bb8]349
350#define QH(queue) \
351 instance->transfers_##queue.queue_head
352
[0535ee4]353 while (1) {
[36a4738]354 const uint16_t cmd = pio_read_16(&instance->registers->usbcmd);
355 const uint16_t sts = pio_read_16(&instance->registers->usbsts);
[b375bb8]356 const uint16_t intr =
357 pio_read_16(&instance->registers->usbintr);
358
[3de48b5]359 if (((cmd & UHCI_CMD_RUN_STOP) != 1) || (sts != 0)) {
360 usb_log_debug2("Command: %X Status: %X Intr: %x\n",
361 cmd, sts, intr);
362 }
[881c47b]363
[cabda7f]364 uintptr_t frame_list =
365 pio_read_32(&instance->registers->flbaseadd) & ~0xfff;
[733a9a8]366 if (frame_list != addr_to_phys(instance->frame_list)) {
[d6f78857]367 usb_log_debug("Framelist address: %p vs. %p.\n",
[b375bb8]368 frame_list, addr_to_phys(instance->frame_list));
[d6f78857]369 }
[b375bb8]370
[0535ee4]371 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff;
[d6f78857]372 usb_log_debug2("Framelist item: %d \n", frnum );
[0535ee4]373
[b375bb8]374 uintptr_t expected_pa = instance->frame_list[frnum] & (~0xf);
375 uintptr_t real_pa = addr_to_phys(QH(interrupt));
376 if (expected_pa != real_pa) {
[881c47b]377 usb_log_debug("Interrupt QH: %p vs. %p.\n",
[b375bb8]378 expected_pa, real_pa);
[881c47b]379 }
380
[b375bb8]381 expected_pa = QH(interrupt)->next_queue & (~0xf);
382 real_pa = addr_to_phys(QH(control_slow));
383 if (expected_pa != real_pa) {
384 usb_log_debug("Control Slow QH: %p vs. %p.\n",
385 expected_pa, real_pa);
[881c47b]386 }
[0535ee4]387
[b375bb8]388 expected_pa = QH(control_slow)->next_queue & (~0xf);
389 real_pa = addr_to_phys(QH(control_full));
390 if (expected_pa != real_pa) {
391 usb_log_debug("Control Full QH: %p vs. %p.\n",
392 expected_pa, real_pa);
[881c47b]393 }
[0535ee4]394
[b375bb8]395 expected_pa = QH(control_full)->next_queue & (~0xf);
396 real_pa = addr_to_phys(QH(bulk_full));
397 if (expected_pa != real_pa ) {
398 usb_log_debug("Bulk QH: %p vs. %p.\n",
399 expected_pa, real_pa);
[881c47b]400 }
[0535ee4]401 async_usleep(UHCI_DEBUGER_TIMEOUT);
402 }
403 return 0;
[b375bb8]404#undef QH
[0535ee4]405}
[4d73d71]406/*----------------------------------------------------------------------------*/
407bool allowed_usb_packet(
[b375bb8]408 bool low_speed, usb_transfer_type_t transfer, size_t size)
[4d73d71]409{
410 /* see USB specification chapter 5.5-5.8 for magic numbers used here */
[b375bb8]411 switch(transfer)
412 {
413 case USB_TRANSFER_ISOCHRONOUS:
414 return (!low_speed && size < 1024);
415 case USB_TRANSFER_INTERRUPT:
416 return size <= (low_speed ? 8 : 64);
417 case USB_TRANSFER_CONTROL: /* device specifies its own max size */
418 return (size <= (low_speed ? 8 : 64));
419 case USB_TRANSFER_BULK: /* device specifies its own max size */
420 return (!low_speed && size <= 64);
[4d73d71]421 }
422 return false;
423}
[c56dbe0]424/**
425 * @}
426 */
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