[c501bc4] | 1 | /*
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| 2 | * Copyright (c) 2010 Lenka Trochtova
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| 3 | * Copyright (c) 2013 Jakub Jermar
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /**
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[0f2a9be] | 31 | * @defgroup malta Malta board platform driver.
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[c501bc4] | 32 | * @brief HelenOS Malta board platform driver.
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| 33 | * @{
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| 34 | */
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| 35 |
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| 36 | /** @file
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| 37 | */
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| 38 |
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| 39 | #include <assert.h>
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| 40 | #include <stdio.h>
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| 41 | #include <errno.h>
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| 42 | #include <stdbool.h>
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| 43 | #include <fibril_synch.h>
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| 44 | #include <stdlib.h>
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| 45 | #include <str.h>
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| 46 | #include <ctype.h>
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| 47 | #include <macros.h>
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| 48 |
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| 49 | #include <ddi.h>
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| 50 | #include <ddf/driver.h>
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| 51 | #include <ddf/log.h>
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| 52 | #include <ipc/dev_iface.h>
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| 53 | #include <ops/hw_res.h>
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[65ac220] | 54 | #include <ops/pio_window.h>
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[c501bc4] | 55 | #include <byteorder.h>
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| 56 |
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[2a37b9f] | 57 | #define NAME "malta"
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[c501bc4] | 58 |
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| 59 | #define GT_BASE UINT32_C(0x1be00000)
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| 60 | #define GT_SIZE (2 * 1024 * 1024)
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| 61 |
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| 62 | #define GT_PCI_CMD 0xc00
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| 63 | #define GT_PCI_CONFADDR 0xcf8
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| 64 | #define GT_PCI_CONFDATA 0xcfc
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| 65 |
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| 66 | #define GT_PCI_CMD_MBYTESWAP 0x1
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| 67 |
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[65ac220] | 68 | #define GT_PCI_MEMBASE UINT32_C(0x10000000)
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| 69 | #define GT_PCI_MEMSIZE UINT32_C(0x08000000)
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| 70 |
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| 71 | #define GT_PCI_IOBASE UINT32_C(0x18000000)
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| 72 | #define GT_PCI_IOSIZE UINT32_C(0x00200000)
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| 73 |
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[2a37b9f] | 74 | typedef struct malta_fun {
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[c501bc4] | 75 | hw_resource_list_t hw_resources;
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[65ac220] | 76 | pio_window_t pio_window;
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[2a37b9f] | 77 | } malta_fun_t;
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[c501bc4] | 78 |
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[2a37b9f] | 79 | static int malta_dev_add(ddf_dev_t *dev);
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[0f2a9be] | 80 | static void malta_init(void);
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[c501bc4] | 81 |
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| 82 | /** The root device driver's standard operations. */
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[2a37b9f] | 83 | static driver_ops_t malta_ops = {
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| 84 | .dev_add = &malta_dev_add
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[c501bc4] | 85 | };
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| 86 |
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| 87 | /** The root device driver structure. */
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[2a37b9f] | 88 | static driver_t malta_driver = {
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[c501bc4] | 89 | .name = NAME,
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[2a37b9f] | 90 | .driver_ops = &malta_ops
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[c501bc4] | 91 | };
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| 92 |
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| 93 | static hw_resource_t pci_conf_regs[] = {
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| 94 | {
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| 95 | .type = IO_RANGE,
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| 96 | .res.io_range = {
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| 97 | .address = GT_BASE + GT_PCI_CONFADDR,
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| 98 | .size = 4,
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[9e470c0] | 99 | .relative = false,
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[c501bc4] | 100 | .endianness = LITTLE_ENDIAN
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| 101 | }
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| 102 | },
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| 103 | {
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| 104 | .type = IO_RANGE,
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| 105 | .res.io_range = {
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| 106 | .address = GT_BASE + GT_PCI_CONFDATA,
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| 107 | .size = 4,
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[9e470c0] | 108 | .relative = false,
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[c501bc4] | 109 | .endianness = LITTLE_ENDIAN
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| 110 | }
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| 111 | }
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| 112 | };
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| 113 |
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[2a37b9f] | 114 | static malta_fun_t pci_data = {
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[c501bc4] | 115 | .hw_resources = {
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| 116 | sizeof(pci_conf_regs) / sizeof(pci_conf_regs[0]),
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| 117 | pci_conf_regs
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[65ac220] | 118 | },
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| 119 | .pio_window = {
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| 120 | .mem = {
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| 121 | .base = GT_PCI_MEMBASE,
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| 122 | .size = GT_PCI_MEMSIZE
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| 123 | },
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| 124 | .io = {
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| 125 | .base = GT_PCI_IOBASE,
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| 126 | .size = GT_PCI_IOSIZE
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| 127 | }
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[c501bc4] | 128 | }
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| 129 | };
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| 130 |
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| 131 | /** Obtain function soft-state from DDF function node */
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[2a37b9f] | 132 | static malta_fun_t *malta_fun(ddf_fun_t *fnode)
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[c501bc4] | 133 | {
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| 134 | return ddf_fun_data_get(fnode);
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| 135 | }
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| 136 |
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[2a37b9f] | 137 | static hw_resource_list_t *malta_get_resources(ddf_fun_t *fnode)
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[c501bc4] | 138 | {
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[2a37b9f] | 139 | malta_fun_t *fun = malta_fun(fnode);
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[c501bc4] | 140 |
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| 141 | assert(fun != NULL);
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| 142 | return &fun->hw_resources;
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| 143 | }
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| 144 |
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[2a37b9f] | 145 | static bool malta_enable_interrupt(ddf_fun_t *fun)
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[c501bc4] | 146 | {
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| 147 | /* TODO */
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| 148 |
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| 149 | return false;
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| 150 | }
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| 151 |
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[2a37b9f] | 152 | static pio_window_t *malta_get_pio_window(ddf_fun_t *fnode)
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[65ac220] | 153 | {
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[2a37b9f] | 154 | malta_fun_t *fun = malta_fun(fnode);
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[65ac220] | 155 |
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| 156 | assert(fun != NULL);
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| 157 | return &fun->pio_window;
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| 158 | }
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| 159 |
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[c501bc4] | 160 | static hw_res_ops_t fun_hw_res_ops = {
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[2a37b9f] | 161 | .get_resource_list = &malta_get_resources,
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| 162 | .enable_interrupt = &malta_enable_interrupt,
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[c501bc4] | 163 | };
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| 164 |
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[65ac220] | 165 | static pio_window_ops_t fun_pio_window_ops = {
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[2a37b9f] | 166 | .get_pio_window = &malta_get_pio_window
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[65ac220] | 167 | };
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| 168 |
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[0f2a9be] | 169 | /* Initialized in malta_init() function. */
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[2a37b9f] | 170 | static ddf_dev_ops_t malta_fun_ops;
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[c501bc4] | 171 |
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| 172 | static bool
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[2a37b9f] | 173 | malta_add_fun(ddf_dev_t *dev, const char *name, const char *str_match_id,
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| 174 | malta_fun_t *fun_proto)
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[c501bc4] | 175 | {
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| 176 | ddf_msg(LVL_DEBUG, "Adding new function '%s'.", name);
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| 177 |
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| 178 | ddf_fun_t *fnode = NULL;
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| 179 | int rc;
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| 180 |
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| 181 | /* Create new device. */
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| 182 | fnode = ddf_fun_create(dev, fun_inner, name);
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| 183 | if (fnode == NULL)
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| 184 | goto failure;
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| 185 |
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[2a37b9f] | 186 | malta_fun_t *fun = ddf_fun_data_alloc(fnode, sizeof(malta_fun_t));
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[c501bc4] | 187 | *fun = *fun_proto;
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| 188 |
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| 189 | /* Add match ID */
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| 190 | rc = ddf_fun_add_match_id(fnode, str_match_id, 100);
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| 191 | if (rc != EOK)
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| 192 | goto failure;
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| 193 |
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| 194 | /* Set provided operations to the device. */
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[2a37b9f] | 195 | ddf_fun_set_ops(fnode, &malta_fun_ops);
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[c501bc4] | 196 |
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| 197 | /* Register function. */
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| 198 | if (ddf_fun_bind(fnode) != EOK) {
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| 199 | ddf_msg(LVL_ERROR, "Failed binding function %s.", name);
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| 200 | goto failure;
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| 201 | }
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| 202 |
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| 203 | return true;
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| 204 |
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| 205 | failure:
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| 206 | if (fnode != NULL)
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| 207 | ddf_fun_destroy(fnode);
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| 208 |
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| 209 | ddf_msg(LVL_ERROR, "Failed adding function '%s'.", name);
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| 210 |
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| 211 | return false;
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| 212 | }
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| 213 |
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[2a37b9f] | 214 | static bool malta_add_functions(ddf_dev_t *dev)
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[c501bc4] | 215 | {
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[2a37b9f] | 216 | return malta_add_fun(dev, "pci0", "intel_pci", &pci_data);
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[c501bc4] | 217 | }
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| 218 |
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| 219 | /** Get the root device.
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| 220 | *
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| 221 | * @param dev The device which is root of the whole device tree (both
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| 222 | * of HW and pseudo devices).
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| 223 | * @return Zero on success, negative error number otherwise.
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| 224 | */
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[2a37b9f] | 225 | static int malta_dev_add(ddf_dev_t *dev)
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[c501bc4] | 226 | {
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| 227 | ioport32_t *gt;
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| 228 | uint32_t val;
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| 229 | int ret;
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| 230 |
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[2a37b9f] | 231 | ddf_msg(LVL_DEBUG, "malta_dev_add, device handle = %d",
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[c501bc4] | 232 | (int)ddf_dev_get_handle(dev));
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| 233 |
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| 234 | /*
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| 235 | * We need to disable byte swapping of the outgoing and incoming
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| 236 | * PCI data, because the PCI driver assumes no byte swapping behind
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| 237 | * the scenes and takes care of it itself.
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| 238 | */
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| 239 | ret = pio_enable((void *) GT_BASE, GT_SIZE, (void **) >);
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| 240 | if (ret != EOK)
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| 241 | return ret;
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| 242 | val = uint32_t_le2host(pio_read_32(
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| 243 | >[GT_PCI_CMD / sizeof(ioport32_t)]));
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| 244 | val |= GT_PCI_CMD_MBYTESWAP;
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| 245 | pio_write_32(
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| 246 | >[GT_PCI_CMD / sizeof(ioport32_t)], host2uint32_t_le(val));
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| 247 |
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| 248 |
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| 249 | /* Register functions. */
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[2a37b9f] | 250 | if (!malta_add_functions(dev)) {
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[c501bc4] | 251 | ddf_msg(LVL_ERROR, "Failed to add functions for the Malta platform.");
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| 252 | }
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| 253 |
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| 254 | return EOK;
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| 255 | }
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| 256 |
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[0f2a9be] | 257 | static void malta_init(void)
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[c501bc4] | 258 | {
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| 259 | ddf_log_init(NAME);
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[2a37b9f] | 260 | malta_fun_ops.interfaces[HW_RES_DEV_IFACE] = &fun_hw_res_ops;
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| 261 | malta_fun_ops.interfaces[PIO_WINDOW_DEV_IFACE] = &fun_pio_window_ops;
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[c501bc4] | 262 | }
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| 263 |
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| 264 | int main(int argc, char *argv[])
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| 265 | {
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| 266 | printf(NAME ": HelenOS Malta platform driver\n");
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[0f2a9be] | 267 | malta_init();
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[2a37b9f] | 268 | return ddf_driver_main(&malta_driver);
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[c501bc4] | 269 | }
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| 270 |
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| 271 | /**
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| 272 | * @}
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| 273 | */
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