source: mainline/uspace/drv/platform/malta/malta.c

Last change on this file was 09ab0a9a, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Fix vertical spacing with new Ccheck revision.

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[c501bc4]1/*
2 * Copyright (c) 2010 Lenka Trochtova
3 * Copyright (c) 2013 Jakub Jermar
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/**
[4122410]31 * @addtogroup malta
[c501bc4]32 * @{
33 */
34
35/** @file
36 */
37
38#include <assert.h>
39#include <stdio.h>
40#include <errno.h>
41#include <stdbool.h>
42#include <fibril_synch.h>
43#include <stdlib.h>
44#include <str.h>
45#include <ctype.h>
46#include <macros.h>
47
48#include <ddi.h>
49#include <ddf/driver.h>
50#include <ddf/log.h>
51#include <ipc/dev_iface.h>
52#include <ops/hw_res.h>
[65ac220]53#include <ops/pio_window.h>
[c501bc4]54#include <byteorder.h>
55
[2a37b9f]56#define NAME "malta"
[c501bc4]57
58#define GT_BASE UINT32_C(0x1be00000)
59#define GT_SIZE (2 * 1024 * 1024)
60
61#define GT_PCI_CMD 0xc00
62#define GT_PCI_CONFADDR 0xcf8
63#define GT_PCI_CONFDATA 0xcfc
64
65#define GT_PCI_CMD_MBYTESWAP 0x1
66
[65ac220]67#define GT_PCI_MEMBASE UINT32_C(0x10000000)
68#define GT_PCI_MEMSIZE UINT32_C(0x08000000)
69
70#define GT_PCI_IOBASE UINT32_C(0x18000000)
71#define GT_PCI_IOSIZE UINT32_C(0x00200000)
72
[2a37b9f]73typedef struct malta_fun {
[c501bc4]74 hw_resource_list_t hw_resources;
[65ac220]75 pio_window_t pio_window;
[2a37b9f]76} malta_fun_t;
[c501bc4]77
[b7fd2a0]78static errno_t malta_dev_add(ddf_dev_t *dev);
[0f2a9be]79static void malta_init(void);
[c501bc4]80
81/** The root device driver's standard operations. */
[2a37b9f]82static driver_ops_t malta_ops = {
83 .dev_add = &malta_dev_add
[c501bc4]84};
85
86/** The root device driver structure. */
[2a37b9f]87static driver_t malta_driver = {
[c501bc4]88 .name = NAME,
[2a37b9f]89 .driver_ops = &malta_ops
[c501bc4]90};
91
92static hw_resource_t pci_conf_regs[] = {
93 {
94 .type = IO_RANGE,
95 .res.io_range = {
96 .address = GT_BASE + GT_PCI_CONFADDR,
97 .size = 4,
[9e470c0]98 .relative = false,
[c501bc4]99 .endianness = LITTLE_ENDIAN
100 }
101 },
102 {
103 .type = IO_RANGE,
104 .res.io_range = {
105 .address = GT_BASE + GT_PCI_CONFDATA,
106 .size = 4,
[9e470c0]107 .relative = false,
[c501bc4]108 .endianness = LITTLE_ENDIAN
109 }
110 }
111};
112
[2a37b9f]113static malta_fun_t pci_data = {
[c501bc4]114 .hw_resources = {
115 sizeof(pci_conf_regs) / sizeof(pci_conf_regs[0]),
116 pci_conf_regs
[65ac220]117 },
118 .pio_window = {
119 .mem = {
120 .base = GT_PCI_MEMBASE,
121 .size = GT_PCI_MEMSIZE
122 },
123 .io = {
124 .base = GT_PCI_IOBASE,
125 .size = GT_PCI_IOSIZE
126 }
[c501bc4]127 }
128};
129
130/** Obtain function soft-state from DDF function node */
[2a37b9f]131static malta_fun_t *malta_fun(ddf_fun_t *fnode)
[c501bc4]132{
133 return ddf_fun_data_get(fnode);
134}
135
[2a37b9f]136static hw_resource_list_t *malta_get_resources(ddf_fun_t *fnode)
[c501bc4]137{
[2a37b9f]138 malta_fun_t *fun = malta_fun(fnode);
[a35b458]139
[c501bc4]140 assert(fun != NULL);
141 return &fun->hw_resources;
142}
143
[b7fd2a0]144static errno_t malta_enable_interrupt(ddf_fun_t *fun, int irq)
[c501bc4]145{
146 /* TODO */
[a35b458]147
[c501bc4]148 return false;
149}
150
[2a37b9f]151static pio_window_t *malta_get_pio_window(ddf_fun_t *fnode)
[65ac220]152{
[2a37b9f]153 malta_fun_t *fun = malta_fun(fnode);
[65ac220]154
155 assert(fun != NULL);
156 return &fun->pio_window;
157}
158
[c501bc4]159static hw_res_ops_t fun_hw_res_ops = {
[2a37b9f]160 .get_resource_list = &malta_get_resources,
161 .enable_interrupt = &malta_enable_interrupt,
[c501bc4]162};
163
[65ac220]164static pio_window_ops_t fun_pio_window_ops = {
[2a37b9f]165 .get_pio_window = &malta_get_pio_window
[65ac220]166};
167
[0f2a9be]168/* Initialized in malta_init() function. */
[2a37b9f]169static ddf_dev_ops_t malta_fun_ops;
[c501bc4]170
171static bool
[2a37b9f]172malta_add_fun(ddf_dev_t *dev, const char *name, const char *str_match_id,
173 malta_fun_t *fun_proto)
[c501bc4]174{
175 ddf_msg(LVL_DEBUG, "Adding new function '%s'.", name);
[a35b458]176
[c501bc4]177 ddf_fun_t *fnode = NULL;
[b7fd2a0]178 errno_t rc;
[a35b458]179
[c501bc4]180 /* Create new device. */
181 fnode = ddf_fun_create(dev, fun_inner, name);
182 if (fnode == NULL)
183 goto failure;
[a35b458]184
[2a37b9f]185 malta_fun_t *fun = ddf_fun_data_alloc(fnode, sizeof(malta_fun_t));
[c501bc4]186 *fun = *fun_proto;
[a35b458]187
[c501bc4]188 /* Add match ID */
189 rc = ddf_fun_add_match_id(fnode, str_match_id, 100);
190 if (rc != EOK)
191 goto failure;
[a35b458]192
[c501bc4]193 /* Set provided operations to the device. */
[2a37b9f]194 ddf_fun_set_ops(fnode, &malta_fun_ops);
[a35b458]195
[c501bc4]196 /* Register function. */
197 if (ddf_fun_bind(fnode) != EOK) {
198 ddf_msg(LVL_ERROR, "Failed binding function %s.", name);
199 goto failure;
200 }
[a35b458]201
[c501bc4]202 return true;
[a35b458]203
[c501bc4]204failure:
205 if (fnode != NULL)
206 ddf_fun_destroy(fnode);
[a35b458]207
[c501bc4]208 ddf_msg(LVL_ERROR, "Failed adding function '%s'.", name);
[a35b458]209
[c501bc4]210 return false;
211}
212
[2a37b9f]213static bool malta_add_functions(ddf_dev_t *dev)
[c501bc4]214{
[2a37b9f]215 return malta_add_fun(dev, "pci0", "intel_pci", &pci_data);
[c501bc4]216}
217
218/** Get the root device.
219 *
220 * @param dev The device which is root of the whole device tree (both
221 * of HW and pseudo devices).
[cde999a]222 * @return Zero on success, error number otherwise.
[c501bc4]223 */
[b7fd2a0]224static errno_t malta_dev_add(ddf_dev_t *dev)
[c501bc4]225{
226 ioport32_t *gt;
227 uint32_t val;
[b7fd2a0]228 errno_t ret;
[c501bc4]229
[2a37b9f]230 ddf_msg(LVL_DEBUG, "malta_dev_add, device handle = %d",
[c501bc4]231 (int)ddf_dev_get_handle(dev));
232
233 /*
[ae7d03c]234 * We need to disable byte swapping of the outgoing and incoming
235 * PCI data, because the PCI driver assumes no byte swapping behind
236 * the scenes and takes care of it itself.
237 */
[c501bc4]238 ret = pio_enable((void *) GT_BASE, GT_SIZE, (void **) &gt);
239 if (ret != EOK)
[18b6a88]240 return ret;
[c501bc4]241 val = uint32_t_le2host(pio_read_32(
242 &gt[GT_PCI_CMD / sizeof(ioport32_t)]));
243 val |= GT_PCI_CMD_MBYTESWAP;
244 pio_write_32(
245 &gt[GT_PCI_CMD / sizeof(ioport32_t)], host2uint32_t_le(val));
246
247 /* Register functions. */
[2a37b9f]248 if (!malta_add_functions(dev)) {
[c501bc4]249 ddf_msg(LVL_ERROR, "Failed to add functions for the Malta platform.");
250 }
[a35b458]251
[c501bc4]252 return EOK;
253}
254
[0f2a9be]255static void malta_init(void)
[c501bc4]256{
257 ddf_log_init(NAME);
[2a37b9f]258 malta_fun_ops.interfaces[HW_RES_DEV_IFACE] = &fun_hw_res_ops;
259 malta_fun_ops.interfaces[PIO_WINDOW_DEV_IFACE] = &fun_pio_window_ops;
[c501bc4]260}
261
262int main(int argc, char *argv[])
263{
264 printf(NAME ": HelenOS Malta platform driver\n");
[0f2a9be]265 malta_init();
[2a37b9f]266 return ddf_driver_main(&malta_driver);
[c501bc4]267}
268
269/**
270 * @}
271 */
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