source: mainline/uspace/drv/ohci/hw_struct/iso_transfer_descriptor.h@ dcaf819

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since dcaf819 was 5e2be267, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

OHCI hw memory structures

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File size: 2.6 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohci
29 * @{
30 */
31/** @file
32 * @brief OHCI driver
33 */
34#ifndef DRV_OHCI_ISO_TRANSFER_DESCRIPTOR_H
35#define DRV_OHCI_ISO_TRANSFER_DESCRIPTOR_H
36
37#include <stdint.h>
38
39typedef struct itd {
40 volatile uint32_t status;
41#define ITD_STATUS_SF_MASK (0xffff) /* starting frame */
42#define ITD_STATUS_SF_SHIFT (0)
43#define ITD_STATUS_DI_MASK (0x7) /* delay int, wait DI frames before int */
44#define ITD_STATUS_DI_SHIFT (21)
45#define ITD_STATUS_DI_NO_INTERRUPT (0x7)
46#define ITD_STATUS_FC_MASK (0x7) /* frame count */
47#define ITD_STATUS_FC_SHIFT (24)
48#define ITD_STATUS_CC_MASK (0xf) /* condition code */
49#define ITD_STATUS_CC_SHIFT (28)
50
51 volatile uint32_t page; /* page number of the first byte in buffer */
52#define ITD_PAGE_BP0_MASK (0xfffff000)
53#define ITD_PAGE_BP0_SHIFT (0)
54
55 volatile uint32_t next;
56#define ITD_NEXT_PTR_MASK (0xfffffff0)
57#define ITD_NEXT_PTR_SHIFT (0)
58
59 volatile uint32_t be; /* buffer end, address of the last byte */
60
61 volatile uint16_t offset[8];
62#define ITD_OFFSET_SIZE_MASK (0x3ff)
63#define ITD_OFFSET_SIZE_SHIFT (0)
64#define ITD_OFFSET_CC_MASK (0xf)
65#define ITD_OFFSET_CC_SHIFT (12)
66
67} __attribute__((packed)) itd_t;
68#endif
69/**
70 * @}
71 */
72
73
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