source: mainline/uspace/drv/ohci/hc.c@ 2571089

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 2571089 was 4125b7d, checked in by Vojtech Horky <vojtechhorky@…>, 14 years ago

usb_log_printf() checks for printf correctness

It is surprising how many printf warnings simple check could
produce ;-).

Next time, it won't compile. Bad, huh?

  • Property mode set to 100644
File size: 15.7 KB
RevLine 
[41b96b4]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
[ff582d47]42#include <usb/usbdevice.h>
[41b96b4]43
[bab71635]44#include "hc.h"
[2759c52]45#include "hcd_endpoint.h"
[41b96b4]46
[7d6a676]47static int interrupt_emulator(hc_t *instance);
[2c617b0]48static void hc_gain_control(hc_t *instance);
49static void hc_init_hw(hc_t *instance);
[6b6e3ed3]50static int hc_init_transfer_lists(hc_t *instance);
[344925c]51static int hc_init_memory(hc_t *instance);
[a6d1bc1]52/*----------------------------------------------------------------------------*/
[53f1c87]53int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
54{
55 assert(instance);
56 assert(hub_fun);
57
[8148ee3a]58 int ret;
59
[53f1c87]60 usb_address_t hub_address =
61 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
[8148ee3a]62 if (hub_address <= 0) {
63 usb_log_error("Failed to get OHCI root hub address.\n");
64 return hub_address;
65 }
[53f1c87]66 instance->rh.address = hub_address;
67 usb_device_keeper_bind(
68 &instance->manager, hub_address, hub_fun->handle);
69
[9a6fde4]70 ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
71 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
[8148ee3a]72 if (ret != EOK) {
73 usb_log_error("Failed to add OHCI rh endpoint 0.\n");
74 usb_device_keeper_release(&instance->manager, hub_address);
75 return ret;
76 }
[6bec59b]77
[53f1c87]78 char *match_str = NULL;
[8148ee3a]79 /* DDF needs heap allocated string */
[6bec59b]80 ret = asprintf(&match_str, "usb&class=hub");
[53f1c87]81 if (ret < 0) {
[6bec59b]82 usb_log_error(
83 "Failed(%d) to create root hub match-id string.\n", ret);
[8148ee3a]84 usb_device_keeper_release(&instance->manager, hub_address);
[53f1c87]85 return ret;
86 }
87
88 ret = ddf_fun_add_match_id(hub_fun, match_str, 100);
89 if (ret != EOK) {
[8148ee3a]90 usb_log_error("Failed add root hub match-id.\n");
[53f1c87]91 }
92 return ret;
93}
94/*----------------------------------------------------------------------------*/
[a6d1bc1]95int hc_init(hc_t *instance, ddf_fun_t *fun, ddf_dev_t *dev,
[e7bc999]96 uintptr_t regs, size_t reg_size, bool interrupts)
[41b96b4]97{
98 assert(instance);
[ff582d47]99 int ret = EOK;
[c2be0e5]100#define CHECK_RET_RETURN(ret, message...) \
101if (ret != EOK) { \
102 usb_log_error(message); \
103 return ret; \
104} else (void)0
[ff582d47]105
106 ret = pio_enable((void*)regs, reg_size, (void**)&instance->registers);
[c2be0e5]107 CHECK_RET_RETURN(ret,
108 "Failed(%d) to gain access to device registers: %s.\n",
109 ret, str_error(ret));
110
[68b5ed6e]111 usb_device_keeper_init(&instance->manager);
[5876d36]112 ret = usb_endpoint_manager_init(&instance->ep_manager,
113 BANDWIDTH_AVAILABLE_USB11);
114 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
[4125b7d]115 str_error(ret));
[e7bc999]116
[2c617b0]117 hc_gain_control(instance);
[8790650]118 ret = hc_init_memory(instance);
[4125b7d]119 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
120 str_error(ret));
[8790650]121 hc_init_hw(instance);
[aa9ccf7]122 fibril_mutex_initialize(&instance->guard);
[2c617b0]123
[8148ee3a]124 rh_init(&instance->rh, instance->registers);
[ff582d47]125
[ff0e354]126 if (!interrupts) {
127 instance->interrupt_emulator =
128 fibril_create((int(*)(void*))interrupt_emulator, instance);
129 fibril_add_ready(instance->interrupt_emulator);
130 }
[7013b14]131
132 list_initialize(&instance->pending_batches);
[6bb0f43]133#undef CHECK_RET_RETURN
[8627377]134 return EOK;
[a6d1bc1]135}
136/*----------------------------------------------------------------------------*/
[6bb0f43]137int hc_add_endpoint(
138 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
139 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
140 size_t mps, size_t size, unsigned interval)
141{
142 endpoint_t *ep = malloc(sizeof(endpoint_t));
143 if (ep == NULL)
144 return ENOMEM;
145 int ret =
146 endpoint_init(ep, address, endpoint, direction, type, speed, mps);
147 if (ret != EOK) {
148 free(ep);
149 return ret;
150 }
151
[2759c52]152 hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
153 if (hcd_ep == NULL) {
[592369ae]154 endpoint_destroy(ep);
[2759c52]155 return ENOMEM;
156 }
157
[6bb0f43]158 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
159 if (ret != EOK) {
[592369ae]160 hcd_endpoint_clear(ep);
[6bb0f43]161 endpoint_destroy(ep);
[5a2c42b]162 return ret;
163 }
164
165 /* Enqueue hcd_ep */
166 switch (ep->transfer_type) {
167 case USB_TRANSFER_CONTROL:
168 instance->registers->control &= ~C_CLE;
169 endpoint_list_add_ep(
170 &instance->lists[ep->transfer_type], hcd_ep);
171 instance->registers->control_current = 0;
172 instance->registers->control |= C_CLE;
173 break;
174 case USB_TRANSFER_BULK:
175 instance->registers->control &= ~C_BLE;
176 endpoint_list_add_ep(
177 &instance->lists[ep->transfer_type], hcd_ep);
178 instance->registers->control |= C_BLE;
179 break;
180 case USB_TRANSFER_ISOCHRONOUS:
181 case USB_TRANSFER_INTERRUPT:
182 instance->registers->control &= (~C_PLE & ~C_IE);
183 endpoint_list_add_ep(
184 &instance->lists[ep->transfer_type], hcd_ep);
185 instance->registers->control |= C_PLE | C_IE;
186 break;
187 default:
188 break;
[6bb0f43]189 }
[5a2c42b]190
[592369ae]191 return EOK;
[6bb0f43]192}
193/*----------------------------------------------------------------------------*/
194int hc_remove_endpoint(hc_t *instance, usb_address_t address,
195 usb_endpoint_t endpoint, usb_direction_t direction)
196{
[592369ae]197 assert(instance);
198 fibril_mutex_lock(&instance->guard);
[2759c52]199 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
200 address, endpoint, direction, NULL);
201 if (ep == NULL) {
[592369ae]202 usb_log_error("Endpoint unregister failed: No such EP.\n");
203 fibril_mutex_unlock(&instance->guard);
[2759c52]204 return ENOENT;
205 }
206
207 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
208 if (hcd_ep) {
[5a2c42b]209 /* Dequeue hcd_ep */
210 switch (ep->transfer_type) {
211 case USB_TRANSFER_CONTROL:
212 instance->registers->control &= ~C_CLE;
213 endpoint_list_remove_ep(
214 &instance->lists[ep->transfer_type], hcd_ep);
215 instance->registers->control_current = 0;
216 instance->registers->control |= C_CLE;
217 break;
218 case USB_TRANSFER_BULK:
219 instance->registers->control &= ~C_BLE;
220 endpoint_list_remove_ep(
221 &instance->lists[ep->transfer_type], hcd_ep);
222 instance->registers->control |= C_BLE;
223 break;
224 case USB_TRANSFER_ISOCHRONOUS:
225 case USB_TRANSFER_INTERRUPT:
226 instance->registers->control &= (~C_PLE & ~C_IE);
227 endpoint_list_remove_ep(
228 &instance->lists[ep->transfer_type], hcd_ep);
229 instance->registers->control |= C_PLE | C_IE;
230 break;
231 default:
232 break;
233 }
[2759c52]234 hcd_endpoint_clear(ep);
235 } else {
236 usb_log_warning("Endpoint without hcd equivalent structure.\n");
237 }
[592369ae]238 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
[6bb0f43]239 address, endpoint, direction);
[592369ae]240 fibril_mutex_unlock(&instance->guard);
241 return ret;
242}
243/*----------------------------------------------------------------------------*/
244endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
245 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
246{
247 assert(instance);
248 fibril_mutex_lock(&instance->guard);
249 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
250 address, endpoint, direction, bw);
251 fibril_mutex_unlock(&instance->guard);
252 return ep;
[6bb0f43]253}
254/*----------------------------------------------------------------------------*/
[1387692]255int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
[41b96b4]256{
257 assert(instance);
258 assert(batch);
[d017cea]259 assert(batch->ep);
[9ff5ff82]260
261 /* check for root hub communication */
[d017cea]262 if (batch->ep->address == instance->rh.address) {
[2bf8f8c]263 return rh_request(&instance->rh, batch);
[41b96b4]264 }
[7013b14]265
[aa9ccf7]266 fibril_mutex_lock(&instance->guard);
[7013b14]267 list_append(&batch->link, &instance->pending_batches);
268 batch_commit(batch);
[d017cea]269 switch (batch->ep->transfer_type) {
[9ff5ff82]270 case USB_TRANSFER_CONTROL:
271 instance->registers->command_status |= CS_CLF;
272 break;
273 case USB_TRANSFER_BULK:
274 instance->registers->command_status |= CS_BLF;
275 break;
276 default:
277 break;
278 }
[7013b14]279
[aa9ccf7]280 fibril_mutex_unlock(&instance->guard);
[4c28d17]281 return EOK;
[41b96b4]282}
283/*----------------------------------------------------------------------------*/
[7d6a676]284void hc_interrupt(hc_t *instance, uint32_t status)
[41b96b4]285{
286 assert(instance);
[eaf1e3d]287 if ((status & ~IS_SF) == 0) /* ignore sof status */
288 return;
[7d6a676]289 if (status & IS_RHSC)
290 rh_interrupt(&instance->rh);
291
[eaf1e3d]292 usb_log_debug("OHCI interrupt: %x.\n", status);
293
294 if (status & IS_WDH) {
[aa9ccf7]295 fibril_mutex_lock(&instance->guard);
[4125b7d]296 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
297 instance->registers->hcca,
298 (void *) addr_to_phys(instance->hcca));
299 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
[aa9ccf7]300 instance->registers->periodic_current);
[eaf1e3d]301
[7013b14]302 link_t *current = instance->pending_batches.next;
303 while (current != &instance->pending_batches) {
304 link_t *next = current->next;
[eaf1e3d]305 usb_transfer_batch_t *batch =
[7013b14]306 usb_transfer_batch_from_link(current);
307
308 if (batch_is_complete(batch)) {
[d6522dd]309 list_remove(current);
[7013b14]310 usb_transfer_batch_finish(batch);
311 }
312 current = next;
[eaf1e3d]313 }
[aa9ccf7]314 fibril_mutex_unlock(&instance->guard);
[4c28d17]315 }
[41b96b4]316}
[7d6a676]317/*----------------------------------------------------------------------------*/
[53f1c87]318int interrupt_emulator(hc_t *instance)
[7d6a676]319{
320 assert(instance);
321 usb_log_info("Started interrupt emulator.\n");
322 while (1) {
[2c617b0]323 const uint32_t status = instance->registers->interrupt_status;
[7d6a676]324 instance->registers->interrupt_status = status;
325 hc_interrupt(instance, status);
[aa9ccf7]326 async_usleep(50000);
[7d6a676]327 }
328 return EOK;
329}
[2c617b0]330/*----------------------------------------------------------------------------*/
331void hc_gain_control(hc_t *instance)
332{
333 assert(instance);
[112d159]334 /* Turn off legacy emulation */
335 volatile uint32_t *ohci_emulation_reg =
336 (uint32_t*)((char*)instance->registers + 0x100);
337 usb_log_debug("OHCI legacy register %p: %x.\n",
338 ohci_emulation_reg, *ohci_emulation_reg);
339 *ohci_emulation_reg = 0;
340
[2c617b0]341 /* Interrupt routing enabled => smm driver is active */
342 if (instance->registers->control & C_IR) {
[112d159]343 usb_log_debug("SMM driver: request ownership change.\n");
[2c617b0]344 instance->registers->command_status |= CS_OCR;
345 while (instance->registers->control & C_IR) {
346 async_usleep(1000);
347 }
[112d159]348 usb_log_info("SMM driver: Ownership taken.\n");
[2c617b0]349 return;
350 }
351
352 const unsigned hc_status =
353 (instance->registers->control >> C_HCFS_SHIFT) & C_HCFS_MASK;
354 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
355 if (hc_status != C_HCFS_RESET) {
[112d159]356 usb_log_debug("BIOS driver found.\n");
[2c617b0]357 if (hc_status == C_HCFS_OPERATIONAL) {
[112d159]358 usb_log_info("BIOS driver: HC operational.\n");
[2c617b0]359 return;
360 }
361 /* HC is suspended assert resume for 20ms */
362 instance->registers->control &= (C_HCFS_RESUME << C_HCFS_SHIFT);
363 async_usleep(20000);
[112d159]364 usb_log_info("BIOS driver: HC resumed.\n");
[2c617b0]365 return;
366 }
367
368 /* HC is in reset (hw startup) => no other driver
369 * maintain reset for at least the time specified in USB spec (50 ms)*/
[112d159]370 usb_log_info("HC found in reset.\n");
[2c617b0]371 async_usleep(50000);
372}
373/*----------------------------------------------------------------------------*/
374void hc_init_hw(hc_t *instance)
375{
[112d159]376 /* OHCI guide page 42 */
[2c617b0]377 assert(instance);
[112d159]378 usb_log_debug2("Started hc initialization routine.\n");
379
380 /* Save contents of fm_interval register */
[2c617b0]381 const uint32_t fm_interval = instance->registers->fm_interval;
[112d159]382 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
[344925c]383
[112d159]384 /* Reset hc */
385 usb_log_debug2("HC reset.\n");
386 size_t time = 0;
[2c617b0]387 instance->registers->command_status = CS_HCR;
[112d159]388 while (instance->registers->command_status & CS_HCR) {
389 async_usleep(10);
390 time += 10;
391 }
392 usb_log_debug2("HC reset complete in %zu us.\n", time);
[344925c]393
[112d159]394 /* Restore fm_interval */
[2c617b0]395 instance->registers->fm_interval = fm_interval;
396 assert((instance->registers->command_status & CS_HCR) == 0);
[344925c]397
[2c617b0]398 /* hc is now in suspend state */
[112d159]399 usb_log_debug2("HC should be in suspend state(%x).\n",
400 instance->registers->control);
[344925c]401
[78d4e1f]402 /* Use HCCA */
403 instance->registers->hcca = addr_to_phys(instance->hcca);
404
405 /* Use queues */
[5a2c42b]406 instance->registers->bulk_head =
407 instance->lists[USB_TRANSFER_BULK].list_head_pa;
[4125b7d]408 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]409 instance->lists[USB_TRANSFER_BULK].list_head,
410 instance->lists[USB_TRANSFER_BULK].list_head_pa);
[78d4e1f]411
412 instance->registers->control_head =
[5a2c42b]413 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
[4125b7d]414 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
[5a2c42b]415 instance->lists[USB_TRANSFER_CONTROL].list_head,
416 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
[78d4e1f]417
[112d159]418 /* Enable queues */
[344925c]419 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
[112d159]420 usb_log_debug2("All queues enabled(%x).\n",
421 instance->registers->control);
422
423 /* Disable interrupts */
424 instance->registers->interrupt_disable = I_SF | I_OC;
425 usb_log_debug2("Disabling interrupts: %x.\n",
426 instance->registers->interrupt_disable);
427 instance->registers->interrupt_disable = I_MI;
428 usb_log_debug2("Enabled interrupts: %x.\n",
429 instance->registers->interrupt_enable);
430
431 /* Set periodic start to 90% */
432 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
433 instance->registers->periodic_start = (frame_length / 10) * 9;
434 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
435 instance->registers->periodic_start,
436 instance->registers->periodic_start, frame_length);
[2c617b0]437
438 instance->registers->control &= (C_HCFS_OPERATIONAL << C_HCFS_SHIFT);
[112d159]439 usb_log_info("OHCI HC up and running(%x).\n",
440 instance->registers->control);
[2c617b0]441}
[6b6e3ed3]442/*----------------------------------------------------------------------------*/
443int hc_init_transfer_lists(hc_t *instance)
444{
445 assert(instance);
[344925c]446
[5a2c42b]447#define SETUP_ENDPOINT_LIST(type) \
[344925c]448do { \
[5a2c42b]449 const char *name = usb_str_transfer_type(type); \
450 int ret = endpoint_list_init(&instance->lists[type], name); \
[6b6e3ed3]451 if (ret != EOK) { \
[5a2c42b]452 usb_log_error("Failed(%d) to setup %s endpoint list.\n", \
[344925c]453 ret, name); \
[5a2c42b]454 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]); \
455 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
456 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
457 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
[344925c]458 } \
459} while (0)
[6b6e3ed3]460
[5a2c42b]461 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
462 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
463 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
464 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
465#undef SETUP_ENDPOINT_LIST
466 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
467 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
[6b6e3ed3]468
469 return EOK;
470}
[344925c]471/*----------------------------------------------------------------------------*/
472int hc_init_memory(hc_t *instance)
473{
474 assert(instance);
[8790650]475 /* Init queues */
[344925c]476 hc_init_transfer_lists(instance);
477
[8790650]478 /*Init HCCA */
[344925c]479 instance->hcca = malloc32(sizeof(hcca_t));
480 if (instance->hcca == NULL)
481 return ENOMEM;
482 bzero(instance->hcca, sizeof(hcca_t));
[78d4e1f]483 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
[344925c]484
485 unsigned i = 0;
486 for (; i < 32; ++i) {
487 instance->hcca->int_ep[i] =
[5a2c42b]488 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
[344925c]489 }
[4125b7d]490 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
[5a2c42b]491 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
492 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
[344925c]493
494 return EOK;
495}
[41b96b4]496/**
497 * @}
498 */
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