source: mainline/uspace/drv/nic/rtl8169/driver.c@ 3a4c6d9

Last change on this file since 3a4c6d9 was 3a4c6d9, checked in by Jiri Svoboda <jiri@…>, 2 months ago

Packet capture (thx Nataliia Korop)
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File size: 33.4 KB
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1/*
2 * Copyright (c) 2025 Jiri Svoboda
3 * Copyright (c) 2014 Agnieszka Tabaka
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <assert.h>
31#include <async.h>
32#include <errno.h>
33#include <str_error.h>
34#include <align.h>
35#include <byteorder.h>
36#include <barrier.h>
37#include <stdbool.h>
38
39#include <as.h>
40#include <ddf/log.h>
41#include <ddf/interrupt.h>
42#include <device/hw_res.h>
43#include <device/hw_res_parsed.h>
44#include <io/log.h>
45#include <nic.h>
46#include <pci_dev_iface.h>
47
48#include <str.h>
49
50#include "defs.h"
51#include "driver.h"
52
53/** Global mutex for work with shared irq structure */
54FIBRIL_MUTEX_INITIALIZE(irq_reg_lock);
55
56static errno_t rtl8169_set_addr(ddf_fun_t *fun, const nic_address_t *addr);
57static errno_t rtl8169_get_device_info(ddf_fun_t *fun, nic_device_info_t *info);
58static errno_t rtl8169_get_cable_state(ddf_fun_t *fun, nic_cable_state_t *state);
59static errno_t rtl8169_get_operation_mode(ddf_fun_t *fun, int *speed,
60 nic_channel_mode_t *duplex, nic_role_t *role);
61static errno_t rtl8169_set_operation_mode(ddf_fun_t *fun, int speed,
62 nic_channel_mode_t duplex, nic_role_t role);
63static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send,
64 nic_result_t *we_receive, uint16_t *time);
65static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive,
66 uint16_t time);
67static errno_t rtl8169_autoneg_enable(ddf_fun_t *fun, uint32_t advertisement);
68static errno_t rtl8169_autoneg_disable(ddf_fun_t *fun);
69static errno_t rtl8169_autoneg_probe(ddf_fun_t *fun, uint32_t *advertisement,
70 uint32_t *their_adv, nic_result_t *result, nic_result_t *their_result);
71static errno_t rtl8169_autoneg_restart(ddf_fun_t *fun);
72static errno_t rtl8169_defective_get_mode(ddf_fun_t *fun, uint32_t *mode);
73static errno_t rtl8169_defective_set_mode(ddf_fun_t *fun, uint32_t mode);
74static errno_t rtl8169_on_activated(nic_t *nic_data);
75static errno_t rtl8169_on_stopped(nic_t *nic_data);
76static void rtl8169_send_frame(nic_t *nic_data, void *data, size_t size);
77static void rtl8169_irq_handler(ipc_call_t *icall, void *);
78static inline errno_t rtl8169_register_int_handler(nic_t *nic_data,
79 cap_irq_handle_t *handle);
80static inline void rtl8169_get_hwaddr(rtl8169_t *rtl8169, nic_address_t *addr);
81static inline void rtl8169_set_hwaddr(rtl8169_t *rtl8169, const nic_address_t *addr);
82
83static void rtl8169_reset(rtl8169_t *rtl8169);
84static errno_t rtl8169_get_resource_info(ddf_dev_t *dev);
85static errno_t rtl8169_fill_resource_info(ddf_dev_t *dev, const hw_res_list_parsed_t *hw_resources);
86static rtl8169_t *rtl8169_create_dev_data(ddf_dev_t *dev);
87
88static errno_t rtl8169_unicast_set(nic_t *nic_data, nic_unicast_mode_t mode,
89 const nic_address_t *, size_t);
90static errno_t rtl8169_multicast_set(nic_t *nic_data, nic_multicast_mode_t mode,
91 const nic_address_t *addr, size_t addr_count);
92static errno_t rtl8169_broadcast_set(nic_t *nic_data, nic_broadcast_mode_t mode);
93
94static uint16_t rtl8169_mii_read(rtl8169_t *rtl8169, uint8_t addr);
95static void rtl8169_mii_write(rtl8169_t *rtl8169, uint8_t addr, uint16_t value);
96static void rtl8169_rx_ring_refill(rtl8169_t *rtl8169, unsigned int first,
97 unsigned int last);
98
99/** Network interface options for RTL8169 card driver */
100static nic_iface_t rtl8169_nic_iface = {
101 .set_address = &rtl8169_set_addr,
102 .get_device_info = &rtl8169_get_device_info,
103 .get_cable_state = &rtl8169_get_cable_state,
104 .get_operation_mode = &rtl8169_get_operation_mode,
105 .set_operation_mode = &rtl8169_set_operation_mode,
106
107 .get_pause = &rtl8169_pause_get,
108 .set_pause = &rtl8169_pause_set,
109
110 .autoneg_enable = &rtl8169_autoneg_enable,
111 .autoneg_disable = &rtl8169_autoneg_disable,
112 .autoneg_probe = &rtl8169_autoneg_probe,
113 .autoneg_restart = &rtl8169_autoneg_restart,
114
115 .defective_get_mode = &rtl8169_defective_get_mode,
116 .defective_set_mode = &rtl8169_defective_set_mode,
117};
118
119irq_pio_range_t rtl8169_irq_pio_ranges[] = {
120 {
121 .base = 0,
122 .size = RTL8169_IO_SIZE
123 }
124};
125
126irq_cmd_t rtl8169_irq_commands[] = {
127 {
128 /* Get the interrupt status */
129 .cmd = CMD_PIO_READ_16,
130 .addr = NULL,
131 .dstarg = 2
132 },
133 {
134 .cmd = CMD_PREDICATE,
135 .value = 3,
136 .srcarg = 2
137 },
138 {
139 /* Mark interrupts as solved */
140 .cmd = CMD_PIO_WRITE_16,
141 .addr = NULL,
142 .value = 0xFFFF
143 },
144 {
145 /* Disable interrupts until interrupt routine is finished */
146 .cmd = CMD_PIO_WRITE_16,
147 .addr = NULL,
148 .value = 0x0000
149 },
150 {
151 .cmd = CMD_ACCEPT
152 }
153};
154
155/** Interrupt code definition */
156irq_code_t rtl8169_irq_code = {
157 .rangecount = sizeof(rtl8169_irq_pio_ranges) / sizeof(irq_pio_range_t),
158 .ranges = rtl8169_irq_pio_ranges,
159 .cmdcount = sizeof(rtl8169_irq_commands) / sizeof(irq_cmd_t),
160 .cmds = rtl8169_irq_commands
161};
162
163/** Basic device operations for RTL8169 driver */
164static ddf_dev_ops_t rtl8169_dev_ops;
165
166static errno_t rtl8169_dev_add(ddf_dev_t *dev);
167static errno_t rtl8169_dev_quiesce(ddf_dev_t *dev);
168
169/** Basic driver operations for RTL8169 driver */
170static driver_ops_t rtl8169_driver_ops = {
171 .dev_add = &rtl8169_dev_add,
172 .dev_quiesce = &rtl8169_dev_quiesce
173};
174
175/** Driver structure for RTL8169 driver */
176static driver_t rtl8169_driver = {
177 .name = NAME,
178 .driver_ops = &rtl8169_driver_ops
179};
180
181static errno_t rtl8169_get_resource_info(ddf_dev_t *dev)
182{
183 assert(dev);
184
185 nic_t *nic_data = nic_get_from_ddf_dev(dev);
186 assert(nic_data);
187
188 hw_res_list_parsed_t hw_res_parsed;
189 hw_res_list_parsed_init(&hw_res_parsed);
190
191 /* Get hw resources form parent driver */
192 errno_t rc = nic_get_resources(nic_data, &hw_res_parsed);
193 if (rc != EOK)
194 return rc;
195
196 /* Fill resources information to the device */
197 errno_t ret = rtl8169_fill_resource_info(dev, &hw_res_parsed);
198 hw_res_list_parsed_clean(&hw_res_parsed);
199
200 return ret;
201}
202
203static errno_t rtl8169_fill_resource_info(ddf_dev_t *dev, const hw_res_list_parsed_t
204 *hw_resources)
205{
206 assert(dev);
207 assert(hw_resources);
208
209 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_dev(dev));
210 assert(rtl8169);
211
212 if (hw_resources->irqs.count != 1) {
213 ddf_msg(LVL_ERROR, "%s device: unexpected irq count", ddf_dev_get_name(dev));
214 return EINVAL;
215 }
216
217 if (hw_resources->io_ranges.count != 1) {
218 ddf_msg(LVL_ERROR, "%s device: unexpected io ranges count", ddf_dev_get_name(dev));
219 return EINVAL;
220 }
221
222 rtl8169->irq = hw_resources->irqs.irqs[0];
223 ddf_msg(LVL_DEBUG, "%s device: irq 0x%x assigned", ddf_dev_get_name(dev), rtl8169->irq);
224
225 rtl8169->regs_phys = (void *)((size_t)RNGABS(hw_resources->io_ranges.ranges[0]));
226 if (hw_resources->io_ranges.ranges[0].size < RTL8169_IO_SIZE) {
227 ddf_msg(LVL_ERROR, "I/O range assigned to the device "
228 "%s is too small.", ddf_dev_get_name(dev));
229 return EINVAL;
230 }
231 ddf_msg(LVL_DEBUG, "%s device: i/o addr %p assigned.", ddf_dev_get_name(dev), rtl8169->regs_phys);
232
233 return EOK;
234}
235
236static errno_t rtl8169_allocate_buffers(rtl8169_t *rtl8169)
237{
238 errno_t rc;
239
240 ddf_msg(LVL_DEBUG, "Allocating DMA buffer rings");
241
242 /* Allocate TX ring */
243 rtl8169->tx_ring = AS_AREA_ANY;
244 rc = dmamem_map_anonymous(TX_RING_SIZE, DMAMEM_4GiB,
245 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->tx_ring_phys,
246 (void **)&rtl8169->tx_ring);
247
248 if (rc != EOK)
249 return rc;
250
251 ddf_msg(LVL_DEBUG, "TX ring address: phys=0x%#" PRIxn ", virt=%p",
252 rtl8169->tx_ring_phys, rtl8169->tx_ring);
253
254 memset(rtl8169->tx_ring, 0, TX_RING_SIZE);
255
256 /* Allocate RX ring */
257 rtl8169->rx_ring = AS_AREA_ANY;
258 rc = dmamem_map_anonymous(RX_RING_SIZE, DMAMEM_4GiB,
259 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->rx_ring_phys,
260 (void **)&rtl8169->rx_ring);
261
262 if (rc != EOK)
263 return rc;
264
265 ddf_msg(LVL_DEBUG, "RX ring address: phys=0x%#" PRIxn ", virt=%p",
266 rtl8169->rx_ring_phys, rtl8169->rx_ring);
267
268 memset(rtl8169->rx_ring, 0, RX_RING_SIZE);
269
270 /* Allocate TX buffers */
271 rtl8169->tx_buff = AS_AREA_ANY;
272 rc = dmamem_map_anonymous(TX_BUFFERS_SIZE, DMAMEM_4GiB,
273 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->tx_buff_phys,
274 &rtl8169->tx_buff);
275
276 if (rc != EOK)
277 return rc;
278
279 ddf_msg(LVL_DEBUG, "TX buffers base address: phys=0x%#" PRIxn " virt=%p",
280 rtl8169->tx_buff_phys, rtl8169->tx_buff);
281
282 /* Allocate RX buffers */
283 rtl8169->rx_buff = AS_AREA_ANY;
284 rc = dmamem_map_anonymous(RX_BUFFERS_SIZE, DMAMEM_4GiB,
285 AS_AREA_READ | AS_AREA_WRITE, 0, &rtl8169->rx_buff_phys,
286 &rtl8169->rx_buff);
287
288 if (rc != EOK)
289 return rc;
290
291 ddf_msg(LVL_DEBUG, "RX buffers base address: phys=0x%#" PRIxn ", virt=%p",
292 rtl8169->rx_buff_phys, rtl8169->rx_buff);
293
294 return EOK;
295}
296
297static rtl8169_t *rtl8169_create_dev_data(ddf_dev_t *dev)
298{
299 assert(dev);
300 assert(!nic_get_from_ddf_dev(dev));
301
302 nic_t *nic_data = nic_create_and_bind(dev);
303 if (!nic_data)
304 return NULL;
305
306 rtl8169_t *rtl8169 = malloc(sizeof(rtl8169_t));
307 if (!rtl8169) {
308 nic_unbind_and_destroy(dev);
309 return NULL;
310 }
311
312 memset(rtl8169, 0, sizeof(rtl8169_t));
313
314 rtl8169->nic_data = nic_data;
315 nic_set_specific(nic_data, rtl8169);
316 nic_set_send_frame_handler(nic_data, rtl8169_send_frame);
317 nic_set_state_change_handlers(nic_data,
318 rtl8169_on_activated, NULL, rtl8169_on_stopped);
319 nic_set_filtering_change_handlers(nic_data,
320 rtl8169_unicast_set, rtl8169_multicast_set, rtl8169_broadcast_set,
321 NULL, NULL);
322
323 fibril_mutex_initialize(&rtl8169->rx_lock);
324 fibril_mutex_initialize(&rtl8169->tx_lock);
325
326 nic_set_wol_max_caps(nic_data, NIC_WV_BROADCAST, 1);
327 nic_set_wol_max_caps(nic_data, NIC_WV_LINK_CHANGE, 1);
328 nic_set_wol_max_caps(nic_data, NIC_WV_MAGIC_PACKET, 1);
329
330 return rtl8169;
331}
332
333static void rtl8169_dev_cleanup(ddf_dev_t *dev)
334{
335 assert(dev);
336
337 if (ddf_dev_data_get(dev))
338 nic_unbind_and_destroy(dev);
339}
340
341static errno_t rtl8169_dev_initialize(ddf_dev_t *dev)
342{
343 errno_t ret;
344
345 rtl8169_t *rtl8169 = rtl8169_create_dev_data(dev);
346 if (rtl8169 == NULL) {
347 ddf_msg(LVL_ERROR, "Not enough memory for initializing %s.", ddf_dev_get_name(dev));
348 return ENOMEM;
349 }
350
351 ret = rtl8169_get_resource_info(dev);
352 if (ret != EOK) {
353 ddf_msg(LVL_ERROR, "Can't obtain H/W resources information");
354 goto failed;
355 }
356
357 ddf_msg(LVL_DEBUG, "The device is initialized");
358 return ret;
359
360failed:
361 ddf_msg(LVL_ERROR, "The device initialization failed");
362 rtl8169_dev_cleanup(dev);
363 return ret;
364
365}
366
367static errno_t rtl8169_register_int_handler(nic_t *nic_data,
368 cap_irq_handle_t *handle)
369{
370 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
371
372 rtl8169_irq_code.ranges[0].base = (uintptr_t) rtl8169->regs;
373 rtl8169_irq_code.cmds[0].addr = rtl8169->regs + ISR;
374 rtl8169_irq_code.cmds[2].addr = rtl8169->regs + ISR;
375 rtl8169_irq_code.cmds[3].addr = rtl8169->regs + IMR;
376 errno_t rc = register_interrupt_handler(nic_get_ddf_dev(nic_data),
377 rtl8169->irq, rtl8169_irq_handler, (void *)rtl8169,
378 &rtl8169_irq_code, handle);
379
380 return rc;
381}
382
383static errno_t rtl8169_dev_add(ddf_dev_t *dev)
384{
385 ddf_fun_t *fun;
386 nic_address_t nic_addr;
387 errno_t rc;
388
389 assert(dev);
390 ddf_msg(LVL_NOTE, "RTL8169_dev_add %s (handle = %zu)",
391 ddf_dev_get_name(dev), ddf_dev_get_handle(dev));
392
393 /* Init structures */
394 rc = rtl8169_dev_initialize(dev);
395 if (rc != EOK)
396 return rc;
397
398 nic_t *nic_data = nic_get_from_ddf_dev(dev);
399 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
400
401 rtl8169->dev = dev;
402 rtl8169->parent_sess = ddf_dev_parent_sess_get(dev);
403 if (rtl8169->parent_sess == NULL)
404 return EIO;
405
406 /* Get PCI VID & PID */
407 rc = pci_config_space_read_16(rtl8169->parent_sess, PCI_VENDOR_ID,
408 &rtl8169->pci_vid);
409 if (rc != EOK)
410 return rc;
411
412 rc = pci_config_space_read_16(rtl8169->parent_sess, PCI_DEVICE_ID,
413 &rtl8169->pci_pid);
414 if (rc != EOK)
415 return rc;
416
417 /* Map register space */
418 rc = pio_enable(rtl8169->regs_phys, RTL8169_IO_SIZE, &rtl8169->regs);
419 if (rc != EOK) {
420 ddf_msg(LVL_ERROR, "Cannot map register space for device %s.",
421 ddf_dev_get_name(dev));
422 goto err_destroy;
423 }
424
425 /* Read MAC address and print it */
426 rtl8169_get_hwaddr(rtl8169, &nic_addr);
427 ddf_msg(LVL_NOTE, "MAC address: %02x:%02x:%02x:%02x:%02x:%02x",
428 nic_addr.address[0], nic_addr.address[1],
429 nic_addr.address[2], nic_addr.address[3],
430 nic_addr.address[4], nic_addr.address[5]);
431
432 rc = nic_report_address(nic_data, &nic_addr);
433 if (rc != EOK)
434 goto err_pio;
435
436 cap_irq_handle_t irq_handle;
437 rc = rtl8169_register_int_handler(nic_data, &irq_handle);
438 if (rc != EOK) {
439 ddf_msg(LVL_ERROR, "Failed to register IRQ handler (%s)", str_error_name(rc));
440 goto err_irq;
441 }
442
443 ddf_msg(LVL_DEBUG, "Interrupt handler installed");
444
445 uint8_t cr_value = pio_read_8(rtl8169->regs + CR);
446 pio_write_8(rtl8169->regs + CR, cr_value | CR_TE | CR_RE);
447
448 fun = ddf_fun_create(nic_get_ddf_dev(nic_data), fun_exposed, "port0");
449 if (fun == NULL) {
450 ddf_msg(LVL_ERROR, "Failed creating device function");
451 goto err_srv;
452 }
453
454 nic_set_ddf_fun(nic_data, fun);
455 ddf_fun_set_ops(fun, &rtl8169_dev_ops);
456
457 rc = ddf_fun_bind(fun);
458 if (rc != EOK) {
459 ddf_msg(LVL_ERROR, "Failed binding device function");
460 goto err_fun_create;
461 }
462
463 rc = nic_fun_add_to_cats(fun);
464 if (rc != EOK) {
465 ddf_msg(LVL_ERROR, "Failed adding function to categories");
466 ddf_fun_unbind(fun);
467 return rc;
468 }
469
470 ddf_msg(LVL_NOTE, "The %s device has been successfully initialized.",
471 ddf_dev_get_name(dev));
472 return EOK;
473
474 // err_fun_bind:
475 // ddf_fun_unbind(fun);
476err_fun_create:
477 ddf_fun_destroy(fun);
478err_srv:
479 /* XXX Disconnect from services */
480 unregister_interrupt_handler(dev, irq_handle);
481err_irq:
482err_pio:
483err_destroy:
484 rtl8169_dev_cleanup(dev);
485 return rc;
486
487 return EOK;
488}
489
490static errno_t rtl8169_dev_quiesce(ddf_dev_t *dev)
491{
492 nic_t *nic;
493 rtl8169_t *rtl8169;
494
495 ddf_msg(LVL_NOTE, "RTL8169_dev_quiesce %s (handle = %zu)",
496 ddf_dev_get_name(dev), ddf_dev_get_handle(dev));
497
498 nic = nic_get_from_ddf_dev(dev);
499 rtl8169 = nic_get_specific(nic);
500
501 /* Reset card */
502 pio_write_8(rtl8169->regs + CONFIG0, 0);
503 rtl8169_reset(rtl8169);
504
505 return EOK;
506}
507
508static errno_t rtl8169_set_addr(ddf_fun_t *fun, const nic_address_t *addr)
509{
510 nic_t *nic_data = nic_get_from_ddf_fun(fun);
511 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
512 errno_t rc;
513
514 fibril_mutex_lock(&rtl8169->rx_lock);
515 fibril_mutex_lock(&rtl8169->tx_lock);
516
517 rc = nic_report_address(nic_data, addr);
518 if (rc != EOK)
519 return rc;
520
521 rtl8169_set_hwaddr(rtl8169, addr);
522
523 fibril_mutex_unlock(&rtl8169->rx_lock);
524 fibril_mutex_unlock(&rtl8169->tx_lock);
525
526 return EOK;
527}
528
529static errno_t rtl8169_get_device_info(ddf_fun_t *fun, nic_device_info_t *info)
530{
531 nic_t *nic_data = nic_get_from_ddf_fun(fun);
532 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
533
534 str_cpy(info->vendor_name, NIC_VENDOR_MAX_LENGTH, "Unknown");
535 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, "Unknown");
536
537 if (rtl8169->pci_vid == PCI_VID_REALTEK)
538 str_cpy(info->vendor_name, NIC_VENDOR_MAX_LENGTH, "Realtek");
539
540 if (rtl8169->pci_vid == PCI_VID_DLINK)
541 str_cpy(info->vendor_name, NIC_VENDOR_MAX_LENGTH, "D-Link");
542
543 if (rtl8169->pci_pid == 0x8168)
544 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, "RTL8168");
545
546 if (rtl8169->pci_pid == 0x8169)
547 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, "RTL8169");
548
549 if (rtl8169->pci_pid == 0x8110)
550 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, "RTL8110");
551
552 return EOK;
553}
554
555static errno_t rtl8169_get_cable_state(ddf_fun_t *fun, nic_cable_state_t *state)
556{
557 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
558 uint8_t phystatus = pio_read_8(rtl8169->regs + PHYSTATUS);
559
560 if (phystatus & PHYSTATUS_LINK)
561 *state = NIC_CS_PLUGGED;
562 else
563 *state = NIC_CS_UNPLUGGED;
564
565 return EOK;
566}
567
568static errno_t rtl8169_get_operation_mode(ddf_fun_t *fun, int *speed,
569 nic_channel_mode_t *duplex, nic_role_t *role)
570{
571 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
572 uint8_t phystatus = pio_read_8(rtl8169->regs + PHYSTATUS);
573
574 *duplex = phystatus & PHYSTATUS_FDX ?
575 NIC_CM_FULL_DUPLEX : NIC_CM_HALF_DUPLEX;
576
577 if (phystatus & PHYSTATUS_10M)
578 *speed = 10;
579
580 if (phystatus & PHYSTATUS_100M)
581 *speed = 100;
582
583 if (phystatus & PHYSTATUS_1000M)
584 *speed = 1000;
585
586 *role = NIC_ROLE_UNKNOWN;
587 return EOK;
588}
589
590static errno_t rtl8169_set_operation_mode(ddf_fun_t *fun, int speed,
591 nic_channel_mode_t duplex, nic_role_t role)
592{
593 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
594 uint16_t bmcr;
595
596 if (speed != 10 && speed != 100 && speed != 1000)
597 return EINVAL;
598
599 if (duplex != NIC_CM_HALF_DUPLEX && duplex != NIC_CM_FULL_DUPLEX)
600 return EINVAL;
601
602 bmcr = rtl8169_mii_read(rtl8169, MII_BMCR);
603 bmcr &= ~(BMCR_DUPLEX | BMCR_SPD_100 | BMCR_SPD_1000);
604
605 /* Disable autonegotiation */
606 bmcr &= ~BMCR_AN_ENABLE;
607
608 if (duplex == NIC_CM_FULL_DUPLEX)
609 bmcr |= BMCR_DUPLEX;
610
611 if (speed == 100)
612 bmcr |= BMCR_SPD_100;
613
614 if (speed == 1000)
615 bmcr |= BMCR_SPD_1000;
616
617 rtl8169_mii_write(rtl8169, MII_BMCR, bmcr);
618 return EOK;
619}
620
621static errno_t rtl8169_pause_get(ddf_fun_t *fun, nic_result_t *we_send,
622 nic_result_t *we_receive, uint16_t *time)
623{
624 return EOK;
625}
626
627static errno_t rtl8169_pause_set(ddf_fun_t *fun, int allow_send, int allow_receive,
628 uint16_t time)
629{
630 return EOK;
631}
632
633static errno_t rtl8169_autoneg_enable(ddf_fun_t *fun, uint32_t advertisement)
634{
635 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
636 uint16_t bmcr = rtl8169_mii_read(rtl8169, MII_BMCR);
637 uint16_t anar = ANAR_SELECTOR;
638
639 if (advertisement & ETH_AUTONEG_10BASE_T_FULL)
640 anar |= ANAR_10_FD;
641 if (advertisement & ETH_AUTONEG_10BASE_T_HALF)
642 anar |= ANAR_10_HD;
643 if (advertisement & ETH_AUTONEG_100BASE_TX_FULL)
644 anar |= ANAR_100TX_FD;
645 if (advertisement & ETH_AUTONEG_100BASE_TX_HALF)
646 anar |= ANAR_100TX_HD;
647 if (advertisement & ETH_AUTONEG_PAUSE_SYMETRIC)
648 anar |= ANAR_PAUSE;
649
650 bmcr |= BMCR_AN_ENABLE;
651 rtl8169_mii_write(rtl8169, MII_BMCR, bmcr);
652 rtl8169_mii_write(rtl8169, MII_ANAR, anar);
653
654 return EOK;
655}
656
657static errno_t rtl8169_autoneg_disable(ddf_fun_t *fun)
658{
659 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
660 uint16_t bmcr = rtl8169_mii_read(rtl8169, MII_BMCR);
661
662 bmcr &= ~BMCR_AN_ENABLE;
663 rtl8169_mii_write(rtl8169, MII_BMCR, bmcr);
664
665 return EOK;
666}
667
668static errno_t rtl8169_autoneg_probe(ddf_fun_t *fun, uint32_t *advertisement,
669 uint32_t *their_adv, nic_result_t *result, nic_result_t *their_result)
670{
671 return EOK;
672}
673
674static errno_t rtl8169_autoneg_restart(ddf_fun_t *fun)
675{
676 rtl8169_t *rtl8169 = nic_get_specific(nic_get_from_ddf_fun(fun));
677 uint16_t bmcr = rtl8169_mii_read(rtl8169, MII_BMCR);
678
679 bmcr |= BMCR_AN_ENABLE;
680 rtl8169_mii_write(rtl8169, MII_BMCR, bmcr);
681 return EOK;
682}
683
684static errno_t rtl8169_defective_get_mode(ddf_fun_t *fun, uint32_t *mode)
685{
686 return EOK;
687}
688
689static errno_t rtl8169_defective_set_mode(ddf_fun_t *fun, uint32_t mode)
690{
691 return EOK;
692}
693
694static void rtl8169_rx_ring_refill(rtl8169_t *rtl8169, unsigned int first,
695 unsigned int last)
696{
697 rtl8169_descr_t *descr;
698 uint64_t buff_phys;
699 unsigned int i = first;
700
701 while (true) {
702 descr = &rtl8169->rx_ring[i];
703 buff_phys = rtl8169->rx_buff_phys + (BUFFER_SIZE * i);
704 descr->control = BUFFER_SIZE | CONTROL_OWN;
705 descr->buf_low = buff_phys & 0xffffffff;
706 descr->buf_high = (buff_phys >> 32) & 0xffffffff;
707
708 if (i == RX_BUFFERS_COUNT - 1)
709 descr->control |= CONTROL_EOR;
710
711 if (i == last)
712 break;
713
714 i = (i + 1) % RX_BUFFERS_COUNT;
715 }
716}
717
718static errno_t rtl8169_on_activated(nic_t *nic_data)
719{
720 errno_t rc;
721 uint64_t tmp;
722
723 ddf_msg(LVL_NOTE, "Activating device");
724
725 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
726
727 /* Reset card */
728 pio_write_8(rtl8169->regs + CONFIG0, 0);
729 rtl8169_reset(rtl8169);
730
731 /* Allocate buffers */
732 rc = rtl8169_allocate_buffers(rtl8169);
733 if (rc != EOK) {
734 ddf_msg(LVL_ERROR, "Error allocating buffers: %s", str_error_name(rc));
735 return 0;
736 }
737
738 /* Initialize RX ring */
739 rtl8169_rx_ring_refill(rtl8169, 0, RX_BUFFERS_COUNT - 1);
740
741 /* Write address of descriptor as start of TX ring */
742 tmp = rtl8169->tx_ring_phys;
743 pio_write_32(rtl8169->regs + TNPDS, tmp & 0xffffffff);
744 pio_write_32(rtl8169->regs + TNPDS + 4, (tmp >> 32) & 0xffffffff);
745 rtl8169->tx_head = 0;
746 rtl8169->tx_tail = 0;
747 rtl8169->tx_ring[15].control = CONTROL_EOR;
748
749 /* Write RX ring address */
750 tmp = rtl8169->rx_ring_phys;
751 pio_write_32(rtl8169->regs + RDSAR, tmp & 0xffffffff);
752 pio_write_32(rtl8169->regs + RDSAR + 4, (tmp >> 32) & 0xffffffff);
753 rtl8169->rx_head = 0;
754 rtl8169->rx_tail = 0;
755
756 /* Clear pending interrupts */
757 pio_write_16(rtl8169->regs + ISR, 0xffff);
758
759 /* Enable TX and RX */
760 uint8_t cr = pio_read_8(rtl8169->regs + CR);
761 cr |= CR_TE | CR_RE;
762 pio_write_8(rtl8169->regs + CR, cr);
763 pio_write_32(rtl8169->regs + MAR0, 0xffffffff);
764 pio_write_32(rtl8169->regs + MAR0 + 4, 0xffffffff);
765
766 /* Configure Receive Control Register */
767 uint32_t rcr = pio_read_32(rtl8169->regs + RCR);
768 rtl8169->rcr_ucast = RCR_ACCEPT_PHYS_MATCH;
769 rcr |= RCR_ACCEPT_PHYS_MATCH | RCR_ACCEPT_ERROR | RCR_ACCEPT_RUNT;
770 pio_write_32(rtl8169->regs + RCR, rcr);
771 pio_write_16(rtl8169->regs + RMS, BUFFER_SIZE);
772
773 pio_write_16(rtl8169->regs + IMR, 0xffff);
774 /* XXX Check return value */
775 hw_res_enable_interrupt(rtl8169->parent_sess, rtl8169->irq);
776
777 return EOK;
778}
779
780static errno_t rtl8169_on_stopped(nic_t *nic_data)
781{
782 ddf_msg(LVL_NOTE, "Stopping device");
783 return EOK;
784}
785
786static void rtl8169_reset(rtl8169_t *rtl8169)
787{
788 pio_write_8(rtl8169->regs + CR, CR_RST);
789 memory_barrier();
790 while (pio_read_8(rtl8169->regs + CR) & CR_RST) {
791 fibril_usleep(1);
792 read_barrier();
793 }
794}
795
796static void rtl8169_link_change(ddf_dev_t *dev)
797{
798 nic_t *nic_data = nic_get_from_ddf_dev(dev);
799 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
800
801 uint8_t phystatus = pio_read_8(rtl8169->regs + PHYSTATUS);
802
803 if (phystatus & PHYSTATUS_LINK) {
804 ddf_msg(LVL_NOTE, "%s: Link up", ddf_dev_get_name(dev));
805
806 int speed;
807 const char *fdx = phystatus & PHYSTATUS_FDX ? "full duplex" : "half duplex";
808
809 if (phystatus & PHYSTATUS_10M)
810 speed = 10;
811
812 if (phystatus & PHYSTATUS_100M)
813 speed = 100;
814
815 if (phystatus & PHYSTATUS_1000M)
816 speed = 1000;
817
818 ddf_msg(LVL_NOTE, "%s: Speed %dMbit/s, %s", ddf_dev_get_name(dev), speed, fdx);
819 } else {
820 ddf_msg(LVL_NOTE, "%s: Link down", ddf_dev_get_name(dev));
821 }
822
823}
824
825/** Notify NIC framework about HW filtering state when promisc mode was disabled
826 *
827 * @param nic_data The NIC data
828 * @param mcast_mode Current multicast mode
829 * @param was_promisc Sign if the promiscuous mode was active before disabling
830 */
831static void rtl8169_rcx_promics_rem(nic_t *nic_data,
832 nic_multicast_mode_t mcast_mode, uint8_t was_promisc)
833{
834 assert(nic_data);
835
836 if (was_promisc != 0) {
837 if (mcast_mode == NIC_MULTICAST_LIST)
838 nic_report_hw_filtering(nic_data, 1, 0, -1);
839 else
840 nic_report_hw_filtering(nic_data, 1, 1, -1);
841 } else {
842 nic_report_hw_filtering(nic_data, 1, -1, -1);
843 }
844}
845
846static errno_t rtl8169_unicast_set(nic_t *nic_data, nic_unicast_mode_t mode,
847 const nic_address_t *addr, size_t addr_count)
848{
849 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
850 uint32_t rcr = pio_read_32(rtl8169->regs + RCR);
851 uint8_t was_promisc = rcr & RCR_ACCEPT_ALL_PHYS;
852 nic_multicast_mode_t mcast_mode;
853
854 nic_query_multicast(nic_data, &mcast_mode, 0, NULL, NULL);
855
856 ddf_msg(LVL_DEBUG, "Unicast RX filter mode: %d", mode);
857
858 switch (mode) {
859 case NIC_UNICAST_BLOCKED:
860 rtl8169->rcr_ucast = 0;
861 rtl8169_rcx_promics_rem(nic_data, mcast_mode, was_promisc);
862 break;
863 case NIC_UNICAST_DEFAULT:
864 rtl8169->rcr_ucast = RCR_ACCEPT_PHYS_MATCH;
865 rtl8169_rcx_promics_rem(nic_data, mcast_mode, was_promisc);
866 break;
867 case NIC_UNICAST_LIST:
868 rtl8169->rcr_ucast = RCR_ACCEPT_PHYS_MATCH | RCR_ACCEPT_ALL_PHYS;
869
870 if (mcast_mode == NIC_MULTICAST_PROMISC)
871 nic_report_hw_filtering(nic_data, 0, 1, -1);
872 else
873 nic_report_hw_filtering(nic_data, 0, 0, -1);
874 break;
875 case NIC_UNICAST_PROMISC:
876 rtl8169->rcr_ucast = RCR_ACCEPT_PHYS_MATCH | RCR_ACCEPT_ALL_PHYS;
877
878 if (mcast_mode == NIC_MULTICAST_PROMISC)
879 nic_report_hw_filtering(nic_data, 1, 1, -1);
880 else
881 nic_report_hw_filtering(nic_data, 1, 0, -1);
882 break;
883 default:
884 return ENOTSUP;
885 }
886
887 fibril_mutex_lock(&rtl8169->rx_lock);
888
889 rcr &= ~(RCR_ACCEPT_PHYS_MATCH | RCR_ACCEPT_ALL_PHYS);
890 pio_write_32(rtl8169->regs + RCR, rcr | rtl8169->rcr_ucast | rtl8169->rcr_mcast);
891 ddf_msg(LVL_DEBUG, "new RCR value: 0x%08x", rcr | rtl8169->rcr_ucast | rtl8169->rcr_mcast);
892
893 fibril_mutex_unlock(&rtl8169->rx_lock);
894 return EOK;
895}
896
897static errno_t rtl8169_multicast_set(nic_t *nic_data, nic_multicast_mode_t mode,
898 const nic_address_t *addr, size_t addr_count)
899{
900 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
901 uint32_t rcr = pio_read_32(rtl8169->regs + RCR);
902 uint64_t mask;
903
904 ddf_msg(LVL_DEBUG, "Multicast RX filter mode: %d", mode);
905
906 switch (mode) {
907 case NIC_MULTICAST_BLOCKED:
908 rtl8169->rcr_mcast = 0;
909 if ((rtl8169->rcr_ucast & RCR_ACCEPT_ALL_PHYS) != 0)
910 nic_report_hw_filtering(nic_data, -1, 0, -1);
911 else
912 nic_report_hw_filtering(nic_data, -1, 1, -1);
913 break;
914 case NIC_MULTICAST_LIST:
915 mask = nic_mcast_hash(addr, addr_count);
916 pio_write_32(rtl8169->regs + MAR0, (uint32_t)mask);
917 pio_write_32(rtl8169->regs + MAR0 + 4, (uint32_t)(mask >> 32));
918 rtl8169->rcr_mcast = RCR_ACCEPT_MULTICAST;
919 nic_report_hw_filtering(nic_data, -1, 0, -1);
920 break;
921 case NIC_MULTICAST_PROMISC:
922 pio_write_32(rtl8169->regs + MAR0, 0xffffffffULL);
923 pio_write_32(rtl8169->regs + MAR0 + 4, (uint32_t)(0xffffffffULL >> 32));
924 rtl8169->rcr_mcast = RCR_ACCEPT_MULTICAST;
925 nic_report_hw_filtering(nic_data, -1, 1, -1);
926 break;
927 default:
928 return ENOTSUP;
929 }
930
931 fibril_mutex_lock(&rtl8169->rx_lock);
932
933 rcr &= ~(RCR_ACCEPT_PHYS_MATCH | RCR_ACCEPT_ALL_PHYS);
934 pio_write_32(rtl8169->regs + RCR, rcr | rtl8169->rcr_ucast | rtl8169->rcr_mcast);
935 ddf_msg(LVL_DEBUG, "new RCR value: 0x%08x", rcr | rtl8169->rcr_ucast | rtl8169->rcr_mcast);
936
937 fibril_mutex_unlock(&rtl8169->rx_lock);
938 return EOK;
939}
940
941static errno_t rtl8169_broadcast_set(nic_t *nic_data, nic_broadcast_mode_t mode)
942{
943 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
944
945 /* Configure Receive Control Register */
946 uint32_t rcr = pio_read_32(rtl8169->regs + RCR);
947
948 ddf_msg(LVL_DEBUG, "Broadcast RX filter mode: %d", mode);
949
950 switch (mode) {
951 case NIC_BROADCAST_BLOCKED:
952 rcr &= ~RCR_ACCEPT_BROADCAST;
953 break;
954 case NIC_BROADCAST_ACCEPTED:
955 rcr |= RCR_ACCEPT_BROADCAST;
956 break;
957 default:
958 return ENOTSUP;
959 }
960
961 pio_write_32(rtl8169->regs + RCR, rcr);
962 ddf_msg(LVL_DEBUG, " new RCR value: 0x%08x", rcr);
963
964 return EOK;
965}
966
967static void rtl8169_transmit_done(ddf_dev_t *dev)
968{
969 unsigned int tail, head;
970 nic_t *nic_data = nic_get_from_ddf_dev(dev);
971 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
972 rtl8169_descr_t *descr;
973 int sent = 0;
974
975 ddf_msg(LVL_DEBUG, "rtl8169_transmit_done()");
976
977 fibril_mutex_lock(&rtl8169->tx_lock);
978
979 head = rtl8169->tx_head;
980 tail = rtl8169->tx_tail;
981
982 while (tail != head) {
983 descr = &rtl8169->tx_ring[tail];
984 descr->control &= (~CONTROL_OWN);
985 write_barrier();
986 ddf_msg(LVL_DEBUG, "TX status for descr %d: 0x%08x", tail, descr->control);
987
988 tail = (tail + 1) % TX_BUFFERS_COUNT;
989 sent++;
990 }
991
992 if (sent != 0)
993 nic_set_tx_busy(nic_data, 0);
994
995 rtl8169->tx_tail = tail;
996
997 fibril_mutex_unlock(&rtl8169->tx_lock);
998}
999
1000static void rtl8169_receive_done(ddf_dev_t *dev)
1001{
1002 nic_t *nic_data = nic_get_from_ddf_dev(dev);
1003 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
1004 rtl8169_descr_t *descr;
1005 nic_frame_list_t *frames = nic_alloc_frame_list();
1006 nic_frame_t *frame;
1007 void *buffer;
1008 unsigned int tail, fsidx = 0;
1009 int frame_size;
1010
1011 ddf_msg(LVL_DEBUG, "rtl8169_receive_done()");
1012
1013 fibril_mutex_lock(&rtl8169->rx_lock);
1014
1015 tail = rtl8169->rx_tail;
1016
1017 while (true) {
1018 descr = &rtl8169->rx_ring[tail];
1019
1020 if (descr->control & CONTROL_OWN)
1021 break;
1022
1023 if (descr->control & RXSTATUS_RES) {
1024 ddf_msg(LVL_WARN, "error at slot %d: 0x%08x\n", tail, descr->control);
1025 tail = (tail + 1) % RX_BUFFERS_COUNT;
1026 continue;
1027 }
1028
1029 if (descr->control & CONTROL_FS)
1030 fsidx = tail;
1031
1032 if (descr->control & CONTROL_LS) {
1033 ddf_msg(LVL_DEBUG, "received message at slot %d, control 0x%08x", tail, descr->control);
1034
1035 if (fsidx != tail)
1036 ddf_msg(LVL_WARN, "single frame spanning multiple descriptors");
1037
1038 frame_size = descr->control & 0x1fff;
1039 buffer = rtl8169->rx_buff + (BUFFER_SIZE * tail);
1040 frame = nic_alloc_frame(nic_data, frame_size);
1041 memcpy(frame->data, buffer, frame_size);
1042 nic_frame_list_append(frames, frame);
1043 }
1044
1045 tail = (tail + 1) % RX_BUFFERS_COUNT;
1046 }
1047
1048 rtl8169_rx_ring_refill(rtl8169, rtl8169->rx_tail, tail);
1049
1050 rtl8169->rx_tail = tail;
1051
1052 fibril_mutex_unlock(&rtl8169->rx_lock);
1053
1054 nic_received_frame_list(nic_data, frames);
1055
1056}
1057
1058/** RTL8169 IRQ handler.
1059 *
1060 * @param icall IRQ event notification
1061 * @param arg Argument (rtl8169_t *)
1062 */
1063static void rtl8169_irq_handler(ipc_call_t *icall, void *arg)
1064{
1065 uint16_t isr = (uint16_t) ipc_get_arg2(icall) & INT_KNOWN;
1066 rtl8169_t *rtl8169 = (rtl8169_t *)arg;
1067
1068 ddf_msg(LVL_DEBUG, "rtl8169_irq_handler(): isr=0x%04x", isr);
1069 pio_write_16(rtl8169->regs + IMR, 0xffff);
1070
1071 while (isr != 0) {
1072 ddf_msg(LVL_DEBUG, "irq handler: remaining isr=0x%04x", isr);
1073
1074 /* Packet underrun or link change */
1075 if (isr & INT_PUN) {
1076 rtl8169_link_change(rtl8169->dev);
1077 pio_write_16(rtl8169->regs + ISR, INT_PUN);
1078 }
1079
1080 /* Transmit notification */
1081 if (isr & (INT_TER | INT_TOK | INT_TDU)) {
1082 rtl8169_transmit_done(rtl8169->dev);
1083 pio_write_16(rtl8169->regs + ISR, (INT_TER | INT_TOK | INT_TDU));
1084 }
1085
1086 /* Receive underrun */
1087 if (isr & INT_RXOVW) {
1088 /* just ack.. */
1089 pio_write_16(rtl8169->regs + ISR, INT_RXOVW);
1090 }
1091
1092 if (isr & INT_SERR) {
1093 ddf_msg(LVL_ERROR, "System error interrupt");
1094 pio_write_16(rtl8169->regs + ISR, INT_SERR);
1095 }
1096
1097 if (isr & (INT_RER | INT_ROK)) {
1098 rtl8169_receive_done(rtl8169->dev);
1099 pio_write_16(rtl8169->regs + ISR, (INT_RER | INT_ROK));
1100 }
1101
1102 isr = pio_read_16(rtl8169->regs + ISR) & INT_KNOWN;
1103 }
1104
1105 pio_write_16(rtl8169->regs + ISR, 0xffff);
1106}
1107
1108static void rtl8169_send_frame(nic_t *nic_data, void *data, size_t size)
1109{
1110 rtl8169_descr_t *descr, *prev;
1111 unsigned int head, tail;
1112 void *buff;
1113 uint64_t buff_phys;
1114 rtl8169_t *rtl8169 = nic_get_specific(nic_data);
1115
1116 if (size > RTL8169_FRAME_MAX_LENGTH) {
1117 ddf_msg(LVL_ERROR, "Send frame: frame too long, %zu bytes",
1118 size);
1119 nic_report_send_error(nic_data, NIC_SEC_OTHER, 1);
1120 }
1121
1122 fibril_mutex_lock(&rtl8169->tx_lock);
1123
1124 ddf_msg(LVL_DEBUG, "send_frame: size: %zu, tx_head=%d tx_tail=%d",
1125 size, rtl8169->tx_head, rtl8169->tx_tail);
1126
1127 head = rtl8169->tx_head;
1128 tail = rtl8169->tx_tail;
1129
1130 if ((head + 1) % TX_BUFFERS_COUNT == tail) {
1131 /* Queue is full */
1132 ddf_msg(LVL_WARN, "TX queue full!");
1133 nic_set_tx_busy(nic_data, 1);
1134 }
1135
1136 /* Calculate address of next free buffer and descriptor */
1137 buff = rtl8169->tx_buff + (BUFFER_SIZE * head);
1138 buff_phys = rtl8169->tx_buff_phys + (BUFFER_SIZE * head);
1139
1140 /* Copy frame */
1141 memcpy(buff, data, size);
1142
1143 /* Setup descriptor */
1144 descr = &rtl8169->tx_ring[head];
1145 prev = &rtl8169->tx_ring[(head - 1) % TX_BUFFERS_COUNT];
1146
1147 ddf_msg(LVL_DEBUG, "current_descr=%p, prev_descr=%p", descr, prev);
1148
1149 descr->control = CONTROL_OWN | CONTROL_FS | CONTROL_LS;
1150 descr->control |= size & 0xffff;
1151 descr->vlan = 0;
1152 descr->buf_low = buff_phys & 0xffffffff;
1153 descr->buf_high = (buff_phys >> 32) & 0xffffffff;
1154
1155 if (head == TX_BUFFERS_COUNT - 1)
1156 descr->control |= CONTROL_EOR;
1157
1158 rtl8169->tx_head = (head + 1) % TX_BUFFERS_COUNT;
1159
1160 ddf_msg(LVL_DEBUG, "control: 0x%08x", descr->control);
1161
1162 write_barrier();
1163
1164 /* Notify NIC of pending packets */
1165 pio_write_8(rtl8169->regs + TPPOLL, TPPOLL_NPQ);
1166 write_barrier();
1167
1168 fibril_mutex_unlock(&rtl8169->tx_lock);
1169}
1170
1171static inline void rtl8169_get_hwaddr(rtl8169_t *rtl8169, nic_address_t *addr)
1172{
1173 int i;
1174
1175 assert(rtl8169);
1176 assert(addr);
1177
1178 for (i = 0; i < 6; i++)
1179 addr->address[i] = pio_read_8(rtl8169->regs + MAC0 + i);
1180}
1181
1182static inline void rtl8169_set_hwaddr(rtl8169_t *rtl8169, const nic_address_t *addr)
1183{
1184 int i;
1185
1186 assert(rtl8169);
1187 assert(addr);
1188
1189 for (i = 0; i < 6; i++)
1190 pio_write_8(rtl8169->regs + MAC0 + i, addr->address[i]);
1191}
1192
1193static uint16_t rtl8169_mii_read(rtl8169_t *rtl8169, uint8_t addr)
1194{
1195 uint32_t phyar;
1196
1197 phyar = PHYAR_RW_READ |
1198 ((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT);
1199
1200 pio_write_32(rtl8169->regs + PHYAR, phyar);
1201
1202 do {
1203 phyar = pio_read_32(rtl8169->regs + PHYAR);
1204 fibril_usleep(20);
1205 } while ((phyar & PHYAR_RW_WRITE) == 0);
1206
1207 return phyar & PHYAR_DATA_MASK;
1208}
1209
1210static void rtl8169_mii_write(rtl8169_t *rtl8169, uint8_t addr, uint16_t value)
1211{
1212 uint32_t phyar;
1213
1214 phyar = PHYAR_RW_WRITE |
1215 ((addr & PHYAR_ADDR_MASK) << PHYAR_ADDR_SHIFT) |
1216 (value & PHYAR_DATA_MASK);
1217
1218 pio_write_32(rtl8169->regs + PHYAR, phyar);
1219
1220 do {
1221 phyar = pio_read_32(rtl8169->regs + PHYAR);
1222 fibril_usleep(20);
1223 } while ((phyar & PHYAR_RW_WRITE) != 0);
1224
1225 fibril_usleep(20);
1226}
1227
1228/** Main function of RTL8169 driver
1229 *
1230 * Just initialize the driver structures and
1231 * put it into the device drivers interface
1232 */
1233int main(void)
1234{
1235 errno_t rc = nic_driver_init(NAME);
1236 if (rc != EOK)
1237 return rc;
1238 nic_driver_implement(
1239 &rtl8169_driver_ops, &rtl8169_dev_ops, &rtl8169_nic_iface);
1240
1241 ddf_log_init(NAME);
1242 ddf_msg(LVL_NOTE, "HelenOS RTL8169 driver started");
1243 return ddf_driver_main(&rtl8169_driver);
1244}
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